대한전자공학회:학술대회논문집 (Proceedings of the IEEK Conference)
- 대한전자공학회 2001년도 하계종합학술대회 논문집(2)
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- Pages.377-380
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- 2001
고속 저전력 곱셈기를 위한 새로운 부분곱 압축기와 ENMODL CLA의 설계
Design of New Partial Product Compressor and ENMODL CLA for High Speed and Low Power Multiplier
초록
In this paper, we propose new partial product compressor and ENMODL (Enhanced-NORA-MODL) CLA(Carry Look-ahead Adder) for high speed and low power multiplier. To reduce transistor count, area, power we developed two new-approaches. One is small size partial product compressor, the other is dynamic CMOS logic ENMODL CLA. The transistor count of new compressor is reduced by 11% as compared with that of conventional one. The speed of ENMODL CLA is increased by 6.27% as compared with NMODL CLA.
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