Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)
- 2001.06b
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- Pages.349-352
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- 2001
Design of Interface Bridge in IP-based SOC
Abstract
As microprocessor and SOC (System On a Chip) performance moves into the GHz speed, the high-speed asynchronous design is becoming challenge due to the disadvantageous power and speed aspects in synchronous designs. The next generation on-chip systems will consist of multiple independently synchronous modules and asynchronous modules for higher performance, so the interface module for data transfer between multiple clocked IPs is designed with Xilinx FPGA and simulated with RISC microprocessor.
Keywords