Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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IP Design of ATM AAL Module for B-ISDN

B-ISDN용 ATM AAL 계층의 IP 설계

  • 손승일 (호남대하교 컴퓨터공학과) ;
  • 김형준 (호남대학교 컴퓨터공학과)
  • Published : 2001.06.01
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Abstract

In this paper, we design IP of ATM AAL layer for B-ISDN. The designed ATM AAL module supports the function for AAL type 0, AAL type 3/4, AAL type 5. The designed IP provides for automatic CRC-32 and CRC-10 for AAL type and AAL type 3/4. Also our IP inserts and extracts the header and trailer for each type automatically. After HDL description, it is verified by the simulation. The designed U is implemented in Xilinx FPGA. Rx AAL module operates at 35MHz and Rx AAL module operates at 50MHz. The designed IP can be applicable in high-speed ATM SAR(Segmentation and Reassembly) chip.

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