Design of a programmable current-mode folding/interpolation CMOS A/D converter

프로그래머블 전류모드 폴딩 . 인터폴레이션 CMOS A/D 변환기 설계

  • 김형훈 (삼성전자 IMT-2000단말연구팀)
  • Published : 2001.06.01

Abstract

An programmable current-mode folding and interpolation analog to digital converter (ADC) with programmable interpolator is proposed in this paper. A programmable interpolator is employed not only to vary the resolution of data converter, but also to decrease a power dissipation within the ADC. Because of varying the number of interpolation circuits, resolution is vary from 6 to 10bit. The designed ADC fabricated by a 0.6${\mu}{\textrm}{m}$ n-well CMOS double metal/single poly process. The experimental result shows the power dissipation from 26 to 87mW with a power supply of 3.3V.

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