Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference (한국전기전자재료학회:학술대회논문집)
- 2001.07a
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- Pages.33-36
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- 2001
Planarization characteristics as a function of polishing time of STI-CMP process
STI CMP 공정의 연마시간에 따른 평탄화 특성
Abstract
Chemical mechanical polishing(CMP) process has been widely used to planarize dielectric layers, which can be applied to the integrated circuits for deep sub-micron technology. The rise throughput and the stability in the device fabrication can be obtained by applying of CMP process to STI structure in 0.18
Keywords
- CMP(Chemical mechanical polishing);
- HSS(High Selectivity Slurry);
- STI(Shallow Trench Isolation);
- APCVD(Atmospheric Pressure Chemical Vapor Deposition);
- step height