The Design of UPFC simulator by using EMTDC

EMTDC를 이용한 시뮬레이터급 통합전력제어기의 설계

  • 전진홍 (한국전기연구원 FACTS&PQ 연구 그룹) ;
  • 송의호 (창원대학교 제어계측공학과) ;
  • 김지원 (한국전기연구원 FACTS&PQ 연구 그룹) ;
  • 전영환 (한국전기연구원 FACTS&PQ 연구 그룹) ;
  • 김학만 (한국전기연구원 FACTS&PQ 연구 그룹) ;
  • 국경수 (한국전기연구원 FACTS&PQ 연구 그룹)
  • Published : 2001.07.18

Abstract

FACTS technology is developed into the sophisticated system technology which combines conventional power system technology with power electronics, micro-process control, and information technology. Its objectives are achieving enhancement of the power system flexibility and maximum utilization of the power transfer capability through improvements of the system reliability, controllability, and efficiency[1]. As a series and shunt compensator, UPFC consists of two inverters with common dc link capacitor bank. It controls the magnitude of shunt bus voltage and real and reactive power flow of transmission line[2]. In this paper, we present the design and control algorithm of UPFC simulator for KERI simulator. As a control algorithm is implemented by digital controller, we consider sample-and-hold of signals In this simulation, we use EMTDC/PSCAD V3.0 software which can simulate instantaneous voltage and current.

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