A New Resource Allocation Algorithm for Low Power Architecture

저 전력 아키텍처 설계를 위한 새로운 자원할당 알고리즘

This paper proposed resource allocation algorithm for the minimum power consumption of functional unit in high level synthesis process as like DSP which is circuit to give many functional unit. In this paper, the proposed method though high level simulation find switching activity in circuit each functional unit exchange for binary sequence length and value bit are logic one value. To used the switching activity find the allocation with minimal power consumption, the proposed method visits all control steps one by one and determines the allocation with minimal power consumption at each control step.