Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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A Band-Selective CPPLL for Fast Acquisition time

빠른 Acquisition 시간을 위한 Band-Selective CPPLL

  • 류상하 (고려대학교 전자공학과 ASIC 설계 연구실) ;
  • 김재완 (고려대학교 전자공학과 ASIC 설계 연구실) ;
  • 김수원 (고려대학교 전자공학과 ASIC 설계 연구실)
  • Published : 2000.06.01
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Abstract

This paper describes a Band-Selective Charge-Pump PLL(CPPLL) for clock recovery and clock generator. The proposed PLL satisfies fast acquisition time and low jitter characteristics simultaneously by reducing initial frequency error. The acquisition time of the designed Band-Selective CPPLL can be decreased down to 55% of a conventional CPPLL.

Keywords