Write Driver of Dual Transistor Size Controlled by Power Detector for Low Power Embedded SRAM

전원 감지기로 제어되는 저전력 임베디드 SRAM용 가변크기 쓰기구동기

This paper describes an SRAM write driver circuit which dissipates small power. The write driver utilizes a dual sized transistor structure to reduce operating current in the write cycle. In the case of higher voltage comparing to Vcc, only one transistor is active, while in the case of low Vcc two transistors are active so as to deliver the current twice. Thus though with the high voltage operation, the power consumption is reduced with keeping the speed in a given specification. Simulation results have verified the functionality of the new circuit and write power is reduced by 7 % per bit.