Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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CMOS-IC Implementation of a Pulse-type Hardware Neuron Model with Bipolar Transistors

  • Torita, Kiyoko (Graduate School of Science & Technology, Nihon University) ;
  • Matsuoka, Jun (Graduate School of Science & Technology, Nihon University) ;
  • Sekine, Yoshifumi (Department of Electronic Engineering, College of Science & Technology, Nihon University)
  • Published : 2000.07.01
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Abstract

A number of studies have recently been made on hardware for a biological neuron f3r application with information processing functions of neural networks. We have been trying to produce hardware from the viewpoint that development of a new hardware neuron model is one of the important problems in the study of neural networks. In this paper, we first discuss the circuit structure of a pulse-type hardware neuron model with the enhancement-mode MOSFETs (E-MOSFETs). And we construct a pulse-type hardware neuron model using I-MOSFETs. As a result, it is shown that our proposed new model can exhibit firing phenomena even if the power supply voltage becomes less than 1.5[V]. So it is verified that our model is profitable for IC.

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