대한전자공학회:학술대회논문집 (Proceedings of the IEEK Conference)

대한전자공학회 (The Institute of Electronics and Information Engineers)
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On Reconfiguration methods of Processor Arrays Based on Sequential Routing

  • Shigei, Noritaka (Dept. of Mathematics & Computer Science, Shimane University) ;
  • Miyajima, Hiromi (Dept.of Electrical and Electronics Engineering, Kagoshima University)
  • 발행 : 2000.07.01
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초록

This paper describes reconfiguration methods for processor arrays as a fault tolerance technique at the fabrication time. First, we show that any method based on a conventional idea cannot achieve optimal in reconfigurability. Then, we present two types of methods based on a new idea, that is sequential routing. The one is optimal in reconfigurability, and the other is advantageous in time complexity.

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