Poly Back-Seal에 의한 웨이퍼 SF(Stacking Fault)감소 효과 연구

The Study of SF Decrease Effect on the Wafer by the Poly Back-Seal

  • 홍능표 (페어차일드코리아반도체(주)) ;
  • 이태선 (페어차일드코리아반도체(주)) ;
  • 최병하 (페어차일드코리아반도체(주)) ;
  • 김태훈 (페어차일드코리아반도체(주)) ;
  • 홍진웅 (광운대학교 전기공학과)
  • Hong, N.P. (FAIRCHILD SEMICONDUCTOR KOREA LTD.) ;
  • Lee, T.S. (FAIRCHILD SEMICONDUCTOR KOREA LTD.) ;
  • Choi, B.H. (FAIRCHILD SEMICONDUCTOR KOREA LTD.) ;
  • Kim, T.H. (FAIRCHILD SEMICONDUCTOR KOREA LTD.) ;
  • Hong, J.W. (KwangWoon University Dept of Electrical Eng.)
  • 발행 : 2000.07.17

초록

Due to the shrinking of the chip size and increasing of the complexity in the modern electronic devices. the defect of wafer are so important to decide the yield in the device process. The engineers has studied the wafer defects and the characteristics. They published lots of the experimental methods. I did an experiment the gettering effect of the defects due to the high temperature and the long time diffusion. Actually, As the thickness of the wafer backside polysilicon is thicker and the diffusion time is faster. the defects on the wafer are decreased. The polysilicon gram boundaries of the wafer backside played an important part as the defect gettering site.

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