Analysis of the Logic Minimization in the Design of 74LS49 and 74LS47 BCD-to-Seven-Segment Decoders

74LS49와 74LS49의 디자인에 사용된 로직최소화에 대한 분석

  • You, Jun-Bok (Dept. of Control & Instrumentation Engneering, Chung-Ang Univ.) ;
  • Chung, Tea-Sang (School of Electrical and Electronics Engineering, Chung-Ang Univ.)
  • Published : 1999.11.20

Abstract

The 74LS49 and 74LS47 chips are MSI circuits and are used for decoding the BCD input and driving seven-segment displays. The logic of these chips are often used not only as component chips in the commercial digital systems, but are used as library components in fairly complicated ASIC designs. Thus, the understanding of the logic characteristics of these chips is beneficial for future applications. It was analyzed reversely that the design of these chips includes a special logic minimization technique, which neither documented nor reported. This paper is to analyze the function of the logic and the special minimization technique adapted in the design of 74LS49 and 74LS47 chips.

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