고속동작과 빠른 Acquisition 특성을 가지는 Charge Pump PLL의 최적설계에 관한 연구

A Study on the Optimum Design of Charge Pump PLL for High Speed and Fast Acquisition

  • 우영신 (고려 대학교 전기공학과 반도체 CAD 연구실) ;
  • 성만영 (고려 대학교 전기공학과 반도체 CAD 연구실)
  • Woo, Young-Shin (Semiconductor & CAD Lab., Department of Electrical Engineering, Korea University) ;
  • Sung, Man-Young (Semiconductor & CAD Lab., Department of Electrical Engineering, Korea University)
  • 발행 : 1999.11.20

초록

This paper describes a charge pump PLL architecture which achieves high frequency operation and fast acquisition. This architecture employs multi-phase frequency detector comprised of precharge type phase frequency detector and conventional phase frequency detector. Operation frequency is increased by using precharge type phase frequency detector when the phase difference is small and acquisition time is shortened by using conventional phase frequency detector and increased charge pump current when the phase difference is large. By virtue of this multi-phase frequency detector structure, the maximum operating frequency of 694MHz at 3.0V and faster acquisition were achieved by simulation.

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