Effect of Alternate Bias Stress on p-channel poly-Si TFT's

P-채널 poly-Si TFT's의 Alternate Bias 스트레스 효과

  • 이제혁 (수원대학교 전자재료공학과) ;
  • 변문기 (수원대학교 전자재료공학과) ;
  • 임동규 (수원대학교 전자재료공학과) ;
  • 정주용 (수원대학교 전자재료공학과) ;
  • 이진민 (수원대학교 전자재료공학과)
  • Published : 1999.05.01

Abstract

The effects of alternate bias stress on p-channel poly-Si TPT's has been systematically investigated. It has been shown that the application of alternate bias stress affects device degradation for the negative bias stress as well as device improvement for the positive bias stress. This effects have been related to the hot carrier injection into the gate oxide rather than the generation of defect states within the poly-Si/SiO$_2$ under bias stress.

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