진상 위상 기법을 이용한 2단 링 구조 발진기 및 고속 나누기 2 회로의 고찰

Two-Stage Ring Oscillator using Phase-Look-Ahead Mehtod and Its Application to High Speed Divider-by-Two Circuit

  • 황종태 (한국과학기술원 전기 및 전자공학과) ;
  • 우성훈 (한국과학기술원 전기 및 전자공학과) ;
  • 황명운 (한국과학기술원 전기 및 전자공학과) ;
  • 류지원 (한국과학기술원 전기 및 전자공학과) ;
  • 조규형 (한국과학기술원 전기 및 전자공학과)
  • Hwang, Jong-Tae (Department of Electrical Engineering Korea Advanced Institute of Science and Technology (KAIST)) ;
  • Woo, Sung-Hun (Department of Electrical Engineering Korea Advanced Institute of Science and Technology (KAIST)) ;
  • Hwang, Myung-Woon (Department of Electrical Engineering Korea Advanced Institute of Science and Technology (KAIST)) ;
  • Ryu, Ji-Youl (Department of Electrical Engineering Korea Advanced Institute of Science and Technology (KAIST)) ;
  • Cho, Gyu-Hyeong (Department of Electrical Engineering Korea Advanced Institute of Science and Technology (KAIST))
  • 발행 : 1999.07.19

초록

A CMOS two-stage oscillator applicable to requiring in- and quadrature-phase components such as RF and data retiming applications are presented using phase-look-ahead technique. This paper clearly describes the operation principle of the presented two-stage oscillator and the principle can be also applicable to the high speed high speed divide-by-two is usually used for prescaler of the frequency synthesizer. Also, the sucessful oscillation of the proposed oscillator using PLA is confirmed through the experiment. The test vehicle is designed using 0.8 ${\mu}m$ N-well CMOS process and it has a maximum 914MHz oscillation showing -75dBclHz phase noise at 100kHz offset with single 2V supply.

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