Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Parallel Implementation of Distributed Sample Scrambler

분산표본혼화기의 병렬구현

  • 정헌주 (현대전자산업주식회사 정보통신연구소) ;
  • 김재형정성현박승철 (현대전자산업주식회사 정보통신연구소 현대전자산업주식회사 정보통신연구소 현대전자산업주식회사 정보통신연구소)
  • Published : 1998.06.01
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Abstract

This paper presents a method and implementation of the parallel distributed sample scrambler(DSS) in the cell-based ATM transmission environment. In the serial processing, it requires very high speed clock because the processing clock of the serial DSS is equal with the data transmission speed. In this paper, we develop a conversion method of the serial SRG(shift register generator) to 8bit parallel realization. In this case, it has a sample data processing problem which is a character of DSS. So, a theory of correction time movement is presented to solve this problem. We has developed a ASIC using this algorithm and verified the recommendation of ITU-T, I.432.

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