Proceedings of the KIEE Conference (대한전기학회:학술대회논문집)

The Korean Institute of Electrical Engineers (대한전기학회)
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REDUCTION OF VOLTAGE STRESS AND INPUT CURRENT HARMONIC DISTORTION IN SINGLE STAGE PFC CONVERTER BY SELECTIVE VARIABLE FREQUENCY CONTROL

선택적 주파수 변환방식에 의한 단상 역률보상회로의 캐패시터전압 및 입력전류 고조파왜곡의 감소

  • Choi, Hang-Seok (School of Electrical Engineering, Seoul National Univ.) ;
  • Lee, Kyu-Chan (School of Electrical Engineering, Seoul National Univ.) ;
  • Cho, Bo-Hyung (School of Electrical Engineering, Seoul National Univ.)
  • 최항석 (서울대학교 공과대학 전기공학부) ;
  • 이규찬 (서울대학교 공과대학 전기공학부) ;
  • 조보형 (서울대학교 공과대학 전기공학부)
  • Published : 1997.07.21
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Abstract

The main two drawbacks of the Sin91e Stage PFC (SS-PFC) converters employing a DCM Boost PFC cell are relatively high voltage stress on the bulk capacitor and the input current harmonic distortion. The high voltage stress on bulk capacitor makes the SS-PFC converter impractical in a universal input application and the input current harmonic distortion lowers power factor. In this paper a selective variable frequency control that reduces the voltage stress on the bulk capacitor and the input current harmonic distortion is proposed. Computer simulation results of the proposed control method are presented.

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