전압형 인버터의 출력전압 상승률 억제를 위한 출력 필터의 설계

Output Filter Design for Suppression of High Voltage Gradient in the Voltage-Fed PWM Inverter

  • 김성준 (서울대학교 공과대학 전기공학부) ;
  • 설승기 (서울대학교 공과대학 전기공학부)
  • Kim, Sung-Jun (School of Electrical Engineering, Seoul National University) ;
  • Sul, Seung-Ki (School of Electrical Engineering, Seoul National University)
  • 발행 : 1995.11.18

초록

This paper proposes a new filter topology that suppresses the high voltage gradient(dv/dt) in ac motor terminals. The high voltage gradient(dv/dt) causes over voltages on the motor windings, the degradation or motor insulation, and the bearing failure. Moreover surge voltage with high voltage gradient(dv/dt) in the PWM inverter red drive system where long line cables are required causes more serious problem to the motor. Thus, the most advisable method is attaching output filter to the inverter output terminals. The conventional output filters have several problems such as bulky size, difficulty or parameter tuning. The proposed filter can be relatively smaller than the conventional filters. By the proposed filter, the shaping or PWM waveform can considerably suppress high dv/dt in motor feeding cable from the inverter. The effectiveness or the proposed filter is compared with that or the conventional one and is verified by the computer simulation.

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