A Study on the Impedance Effect of Nonvolatile SNOSEFT EFFPROM Memory Devices

비휘발성 SNOSEFT EFFPROM 기억소자의 임피던스 효과에 관한 연구

  • 강창수 (유한전문대 전자과) ;
  • 김동진 (유한전문대 전자과) ;
  • 김선주 (광운대학교 전자재료공학과) ;
  • 이상배 (광운대학교 전자재료공학과) ;
  • 이성배 (광운대학교 전자재료공학과) ;
  • 서광열 (광운대학교 전자재료공학과)
  • Published : 1995.05.01

Abstract

In this pacer, The effect of the impedances in SNOSEFT s memory devices has been developed. The effect of source and drain impedances are measuring using the method of the field effect bias resistance in the inner resistance regions of the device structure and external bias resistance. The effect of impedance by source and drain resistance shows according to increasing to the storage of memory charges, shows according to a function of decreasing to the gate voltages, shows the delay of threshold voltages, The delay time of low conductance state and high conductance state by the impedance effect shows 3 [${\mu}$sec] and 1[${\mu}$sec] respectively.

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