대한전기학회:학술대회논문집 (Proceedings of the KIEE Conference)
- 대한전기학회 1995년도 하계학술대회 논문집 B
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- Pages.922-924
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- 1995
기억논리소자에서의 전달지연시간에 의한 Critical Time의 변화 양상 고찰
A Study on the Effect of Propagation Delay Time on Critical Time in Storage Elements
- Joo, Y.J. (Hyoundai Electronic Co.) ;
- Lee, S.H. (Dept. of Electrical Engineering, Korea Univ.) ;
- Ryoo, J.H. (Dept. of Electrical Engineering, Korea Univ.) ;
- Lee, S.H. (Han Seo Univ.) ;
- Sung, Y.K. (Dept. of Electrical Engineering, Korea Univ.)
- 발행 : 1995.07.20
초록
The modeling of accurate timing in storage elements of ASIC cell library was studied. The propagation delay time of clock signal affects the critical time and this can cause malfunction in the chip designed in synchronous. In this paper, an analysis on the effect of input slope of clock signal in timing modeling were carried out. For the first time, in ASIC design, the design guides that can be used in both
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