A Snubber Design for Low Power Dissipation and Overvoltage Limitation in Three-Level GTO Inverters

3-레벨 GTO 인버터를 위한 새로운 스너버회로 설계

  • 서재형 (한양대학교 전기공학과) ;
  • 서범석 (한양대학교 전기공학과) ;
  • 현동석 (한양대학교 전기공학과)
  • Published : 1994.11.18

Abstract

This paper presents a new low loss snubber including the overvoltage snubber for three-level GTO inverters. The proposed snubber can not only minimizes the snubber loss and the number of components but also improve blocking voltage balancing problem between the inner and the outer GTOs.

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