대한전기학회:학술대회논문집 (Proceedings of the KIEE Conference)
- 대한전기학회 1990년도 하계학술대회 논문집
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- Pages.521-524
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- 1990
고속 신호처리를 위한 3-Stage 연산증폭기 설계
The Three-Stage Operational Amplifier Design for High Speed Signal Processing
- Kim, D.Y. (Dept.of Electrical Engineering, Chonbuk National University) ;
- Jo, S.I. (Dept.of Electrical Engineering, Chonbuk National University) ;
- Kim, S. (Dept.of Electrical Engineering, Chonbuk National University) ;
- Bang, J.H. (Dept.of Electrical Engineering, Chonbuk National University)
- 발행 : 1990.07.05
초록
There is an increasing interest in high-speed signal processing in modern telecommunication and consumer electronics applications. HDTV, ISDN. A limiting factor in Op-Amp based analog integrated circuits is the limited useful frequency range. This research program will develop a new CMOS Op-Amp architecture with improved gainband width product. The new design CMOS Op-Amp will achieve up to 100MHz unity gainband width with a 1.5-micron design rule.
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