LDD MOSFET 채널 전계의 특성해석

Characterization of Channel Electric Field in LDD MOSFET

  • 박민형 (서울대학교 전기공학과) ;
  • 한민구 (서울대학교 전기공학과)
  • Park, Min-Hyoung (Department of Electrical Engineering, Seoul National University) ;
  • Han, Min-Koo (Department of Electrical Engineering, Seoul National University)
  • 발행 : 1988.11.25

초록

A simple analytical model for the lateral channel electric field in gate - offset structured Lightly Doped Drain MOSFET has been developed. The model's results agree well with two dimensional device simulations. Due to its simplicity, our model gives a better understanding of the mechanisms involved in reducing the electric field in the LDD MOSFET. The model shows clearly the dependencies of the lateral channel electric field as function of drain and gate bias conditions and process, design parameters. Advantages of analytical model over costly 2-D device simulations is to identify the effects of various parameters, such as oxide thickness, junction depth, gate / drain bias, the length and doping concentration of the lightly doped region, on the peak electric field that causes hot - electron phenomena, individually. We are able to find the optimum doping concentration of LDD minimizing the peak electric field and hot - electron effects.

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