대한전기학회:학술대회논문집 (Proceedings of the KIEE Conference)
- 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
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- Pages.647-650
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- 1988
트랜스퓨터를 사용한 피라미드형 병렬 어레이 컴퓨터 (TPPAC) 구조
Transputer-based Pyramidal Parallel Array Computer(TPPAC) architecture (Prelimineary Version)
- Jeong, Chang-Sung (High Performance Computer Lab., Dept. of Computer Science Pohang Institute of Science and Technology) ;
- Jeong, Chul-Hwan (High Performance Computer Lab., Dept. of Computer Science Pohang Institute of Science and Technology)
- 발행 : 1988.07.01
초록
This paper proposes and sketches out a new parallel architecture of transputer-based pyramidal parallel array computer (TPPAC) used to process computationally intensive problems for geometric processing applications such as computer vision, image processing etc. It explores how efficiently the pyramid computer architecture is designed using transputer chips, and poses a new interconnection scheme for TPPAC without using additional transputers.
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