KUIC_DRC : VLSI Layout Verification

KUIC_DRC : 집적회로 마스크 도면 검증

  • Seo, In-Hwan (Dept. of Electronic Engineering Kyungpook National University) ;
  • Kim, Tae-Hoon (Dept. of Electronic Engineering Kyungpook National University) ;
  • Kim, Hong-Rak (Dept. of Electronic Engineering Kyungpook National University) ;
  • Kim, Jung-Ryoul (Dept. of Electronic Engineering Kyungpook National University) ;
  • Chung, Ho-Sun (Dept. of Electronic Engineering Kyungpook National University) ;
  • Lee, Wu-Il (Dept. of Electronic Engineering Kyungpook National University)
  • 서인환 (경북 대학교 전자 공학과) ;
  • 김태훈 (경북 대학교 전자 공학과) ;
  • 김홍락 (경북 대학교 전자 공학과) ;
  • 김종렬 (경북 대학교 전자 공학과) ;
  • 정호선 (경북 대학교 전자 공학과) ;
  • 이우일 (경북 대학교 전자 공학과)
  • Published : 1988.07.01

Abstract

This paper describes KUIC_DRC(Kyungpook national University Intelligent CAD_Design Rule Checker) which verifies VLSI layout. It uses modified linked list data structure. The input form is modifed CIF(Caltech Intermediate Form), called KIF(Kyungpook Intermediate Form). It makes error file, a KIF file. It is written in C language and excuted on MS-DOS, in IBM PC/AT.

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