A study on the systolic architecture of R-S decoder

R-S 복호기의 Systolic 설계에 관한 연구

  • Published : 1988.07.01

Abstract

In this paper, the design of decoder for R-S code using discrete finite-field Fourier transform is presented. An important ingredient of this design is a modified Euclid algorithm for computing the error-locator polynomial. The computation of inverse elements is completely avoided in this modification of Euclid algorithm. This decoder is regular and simple, and naturally suitable for VLSI implementation.

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