Proceedings of the KIEE Conference (대한전기학회:학술대회논문집)
- 1987.07b
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- Pages.1492-1494
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- 1987
Design and Simulation of Edge Painting Machine for Image Rasterization
Image rasterization을 위한 Edge Painting Machine의 설계 및 simulation
- Choi, Sang-Gil (Dept. of Electrical Engineering, KAIST) ;
- Kim, Sung-Soo (Dept. of Electrical Engineering, KAIST) ;
- Eo, Kil-Su (Dept. of Electrical Engineering, KAIST) ;
- Kyung, Chong-Min (Dept. of Electrical Engineering, KAIST)
- 최상길 (한국 과학 기술원 전기 및 전자 공학과) ;
- 김성수 (한국 과학 기술원 전기 및 전자 공학과) ;
- 어길수 (한국 과학 기술원 전기 및 전자 공학과) ;
- 경종민 (한국 과학 기술원 전기 및 전자 공학과)
- Published : 1987.07.03
Abstract
This paper describes a hardware architecture called Edge Painting Machine for real time generation of scan line images for raster scan graphics display. The Edge Painting Machine consists of Scanline Processor which converts polygon data sorted in their depth priority into a set of scan line commands for each scan line, and Edge Painting Tree which converts the scanline commands set into a raster line image. Edge painting tree has been designed using combinational logic circuit. The designed circuit has been simulated to verify the proper functioning. A salient feature of the EPT is that hardware composition is simple, because each processor is constituted by only combinational logic circuit.
Keywords