• Journal of Korea Multimedia Society
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• v.7 no.7
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• pp.886-895
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• 2004

In this paper, we propose the dynamic allocation scheme of the CPU bandwidth to efficiently integrate and schedule these tasks in the same system, where multimedia tasks and hard real-time tasks can coexist simultaneously. Hard real-time tasks are guaranteed based on worst case execution times, whereas multimedia tasks modeled as soft real-time tasks are served based on mean parameters. This paper describes a server-based allocation scheme for assigning the CPU resource to two types of tasks. Especially for MPEG video streams, we show how to dynamically control the fraction of the CPU bandwidth allocated to each multimedia task. The primary purpose of the proposed method is to minimize the mean tardiness of multimedia tasks while satisfying the timing constraints of hard real-time tasks present in the system. We showed through simulations that the tardiness experienced by multimedia tasks under the proposed allocation scheme is much smaller than that experienced by using other scheme.

• Journal of the Korea Society of Computer and Information
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• v.18 no.3
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• pp.1-10
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• 2013

In this paper, we propose a method of embedded linux light-weight to improve efficiency of application running on embedded systems. Three methods including fast booting scheme applying the Hibernation technique, JFFS2 file system optimization applying the Symbolic Link and virtual address mapping, kernel light-weight that guarantees the general purpose was applied. Since then check the system dependency and generate kernel image according to the target embedded kit. And embedded system performance of existing linux and linux which the method proposed in this paper was compared. In experimental result, the kernel size was 9.6% improved and the system booting time was 18% improved. And application processing speed on target embedded kit was improved 11% in the best case, 66% in the worst case. This result show that the light-weight method proposed in this paper is guarantee fast booting time and securing resources and it is good for the application processing speed improvement.

• The Journal of the Korea Contents Association
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• v.7 no.1
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• pp.83-93
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• 2007

In this paper, we address a power-aware scheduling algorithm for a mixed real-time system which consists of periodic and sporadic tasks, each of which is characterized by its minimum period, worst-case execution requirement and deadline. We propose a dynamic voltage scaling algorithm called DVSMT(DVS for mixed tasks), which dynamically scales down the supplying voltage(and thus the frequency) using on-line distribution of the borrowed resources when jobs complete while still meeting their deadlines. With this scheme, we could reduce more energy consumption. As the proposed algorithm can be easily incorporated with RTOS(Real-Time Operating System), it is applicable for handhold devices and sensor network nodes that use a limited battery power. Simulation results show that DVSMT saves up 60% more than the existing algorithms both in the periodic-task and mixed-task systems.

• Journal of Korean Society of Industrial and Systems Engineering
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• v.38 no.4
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• pp.64-71
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• 2015

In this paper, we present a multi-period 0-1 knapsack problem which has the cardinality constraints. Theoretically, the presented problem can be regarded as an extension of the multi-period 0-1 knapsack problem. In the multi-period 0-1 knapsack problem, there are n jobs to be performed during m periods. Each job has the execution time and its completion gives profit. All the n jobs are partitioned into m periods, and the jobs belong to i-th period may be performed not later than in the i-th period, i = 1, ${\cdots}$, m. The total production time for periods from 1 to i is given by $b_i$ for each i = 1, ${\cdots}$, m, and the objective is to maximize the total profit. In the extended problem, we can select a specified number of jobs from each of periods associated with the corresponding cardinality constraints. As the extended problem is NP-hard, the branch and bound method is preferable to solve it, and therefore it is important to have efficient procedures for solving its linear programming relaxed problem. So we intensively explore the LP relaxed problem and suggest a polynomial time algorithm. We first decompose the LP relaxed problem into m subproblems associated with each cardinality constraints. Then we identify some new properties based on the parametric analysis. Finally by exploiting the special structure of the LP relaxed problem, we develop an efficient algorithm for the LP relaxed problem. The developed algorithm has a worst case computational complexity of order max[$O(n^2logn)$, $O(mn^2)$] where m is the number of periods and n is the total number of jobs. We illustrate a numerical example.

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.5
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• pp.243-254
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• 2005

Soft real-time applications such as multimedia feature highly variable processor requirements and probabilistic guarantees on deadline misses, meaning that each task in the application meets its deadline with a given probability. Thus, for such soft real-time applications, a system designer may want to improve the system utilization by allocating to each task a processor time less than its worst-case requirement, as long as the imposed probabilistic timing constraint is met. In this case, however, we have to address how to schedule jobs of a task that require more than (or, overrun) the allocated processor time to the task. In this paper, to address the overrun problem, we propose an overrun control method, which probabilistically controls the execution of overrunning jobs. The proposed overrun control method probabilistically allows overrunning jobs to complete for better system utilization, and also probabilistically prevents the overrunning jobs from completing so that the required probabilistic timing constraint for each task can be met. In the paper, we show that the proposed method outperforms previous methods proposed in the literature in terms of the overall deadline miss ratio, and that it is possible to synthesize the scheduling parameters of our method so that all tasks can meet the given probabilistic timing constraints.

• The KIPS Transactions:PartC
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• v.12C no.1 s.97
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• pp.147-156
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• 2005

CGI is a standard interface rule between web server and gateway devised for the gateway's standard output to replace a static web document in UNIX environment. So, it is common to use standard I/O statements provided by the programming language for the CGI gateway. But the standard I/O mechanism is one of buffer strategies that are designed transparently to operating system and optimized for generic cases. This means that it nay be useful to apply another optimization to the standard I/O environment in CGI gateway. In this paper, we introduced standard output method and file output method as the two output optimization areas for CGI gateways written in C language in the UNIX/LINUX systems, and applied the proposed methods of each area to Debian LINUX, IBM AIX, SUN Solaris, Digital UNIX respectively. Then we analyzed the effect of them focused on execution time. The results were different from operating system to operating system. Compared to normal situation, the best case of standard output area showed about $10{\%}$ improvement and the worst case showed $60{\%}$ degradation in file output area where some performance improvements were expected.

• Journal of KIISE:Computer Systems and Theory
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• v.34 no.2
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• pp.73-83
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• 2007

In network intrusion prevention, attack packets are detected and filtered out based on their attack signatures. Pattern matching is extensively used to find attack signatures and the most time-consuming execution part of Network Intrusion Prevention Systems(NIPS). Pattern matching is usually accelerated by hardware and should be performed at wire speed in NIPS. However, that alone is not good enough. First, pattern matching hardware should be able to generate sufficient pattern match information including the pattern index number and the location of the match found at wire speed. Second, it should support pattern grouping to reduce unnecessary pattern matches. Third, it should always have a constant worst-case performance even if the number of patterns is increased. Finally it should be able to update patterns in a few minutes or seconds without stopping its operations, We propose a system architecture to meet the above requirement. The system architecture can process multiple pattern characters in parallel and employs a pipeline architecture to achieve high speed. Using Xilinx FPGA simulation, we show that the new system stales well to achieve a high speed oner 10Gbps and satisfies all of the above requirements.