• ETRI Journal
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• 제28권4호
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• pp.486-494
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• 2006

Two current-mode and/or voltage-mode quadrature oscillator circuits each using one fully-differential second-generation current conveyor (FDCCII), two grounded capacitors, and two (or three) grounded resistors are presented. In the proposed circuits, the current-mode quadrature signals have the advantage of high-output impedance. The oscillation conditions and oscillation frequencies are orthogonally (or independently) controllable. The current-mode and voltage-mode quadrature signals can be simultaneously obtained from the second proposed circuit. The use of only grounded capacitors and resistors makes the proposed circuits ideal for integrated circuit implementation. Simulation results are also included.

• Journal of Power Electronics
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• 제15권6호
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• pp.1609-1618
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• 2015

DC microgrids are considered as prospective systems because of their easy connection of distributed energy resources (DERs) and electric vehicles (EVs), reduction of conversion loss between dc output sources and loads, lack of reactive power issues, etc. These features make them very suitable for future industrial and commercial buildings' power systems. In addition, the bipolar-type dc system structure is more popular, because it provides two voltage levels for different power converters and loads. To keep voltage balanced in such a dc system, a bidirectional dual buck-boost voltage balancer with direct coupling is introduced based on P-cell and N-cell concepts. This results in greatly enhanced system reliability thanks to no shoot-through problems and lower switching losses with the help of power MOSFETs. In order to increase system efficiency and reliability, a novel burst-mode control strategy is proposed for the dual buck-boost voltage balancer. The basic operating principle, the current relations, and a small-signal model of the voltage balancer are analyzed under the burst-mode control scheme in detail. Finally, simulation experiments are performed and a laboratory unit with a 5kW unbalanced ability is constructed to verify the viability of the bidirectional dual buck-boost voltage balancer under the proposed burst-mode control scheme in low-voltage bipolar-type dc microgrids.

• Journal of Power Electronics
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• 제12권2호
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• pp.276-284
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• 2012

AC/AC power conversion is widely used to feed AC loads with a variable voltage and/or a variable frequency from a constant voltage constant frequency power grid or to connect critical loads to an unreliable power supply while delivering a very balanced and accurate sinusoidal voltage system of constant amplitude and frequency. The load specifications will clearly impose the requirements for the inverter stage of the power converter, while wider ranges of choices are available for the rectifier. This paper investigates the utilization of a buck-type current source rectifier as the active front-end stage of an AC/AC converter for applications that require an adjustable DC-link voltage as well as elimination of the low-frequency common mode voltage. The proposed solution is to utilize a combination of two or more zero current vectors in the Space Vector Modulation (SVM) technique for Current Sources Rectifiers (CSR).

• Journal of Power Electronics
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• 제16권6호
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• pp.2076-2084
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• 2016

In this paper, a novel scheme to eliminate common-mode voltage (CMV) is proposed for three-level neutral-point clamped (NPC) inverters. In the proposed scheme, a low-power full-bridge converter is utilized to produce compensatory voltage for CMV, which is injected into an NPC inverter through a single-phase four-winding transformer. With the proposed circuit, the power range for applications is not limited, and the maximum modulation index of the inverter is not reduced. These features are suitable for high-power medium-voltage machine drives. The effectiveness of the proposed method is verified by simulation and experimental results.

• 한국지능시스템학회:학술대회논문집
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• 한국퍼지및지능시스템학회 2007년도 춘계학술대회 학술발표 논문집 제17권 제1호
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• pp.477-480
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• 2007

저전력 OFDM(orthogonal frequency division multiplexing) 시스템용 FFT(Fast-Fourier-Transform) LSI를 저전력 동작을 시키기 위해서 FFT LSI는 current-mode 회로로 구현되었다. Current-mode FFT LSI에서, VIC(Voltage-to-current converter)는 입력 전압 신호를 전류로 바꾸는 first main device이다. 저전력 OFDM을 위해 FFT LSI와 VIC가 한 개의 칩과 결합되는 것을 고려하면, VIC는 전력 손실은 낮고, VIC와 FFT LSI 사이에서의 DC offset 전류는 최소인 작은 크기의 chip으로 설계되어야 한다. 본 논문에서는 새로운 VIC를 제안한다. 선형 동작구간을 넓히고 DC offset 전류를 대폭 감소하는 방법을 제시하였다. VIC는 0.35[um] CMOS process로 구현되었으며, 시뮬레이션 결과에 따르면 제안된 VIC는 current-mode FFT LSI와 0.1[uA] 미만의 매우 작은 DC offset 전류, 1.4[V]의 넓은 선형구간을 갖으며, 저전력으로 동작한다.

• 한국재료학회지
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• 제28권10호
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• pp.544-550
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• 2018

The passivation of AZ91D Mg alloys by plasma anodization requires deliberate choice of process parameters due to the presence of large amounts of structural defects. We study the dependence of pore formation, surface roughness and corrosion resistance on voltage by comparing the direct current (DC) mode and the pulse wave (pulse) mode in which anodization is performed. In the DC plasma anodization mode, the thickness of the electrolytic oxide film of the AZ91D alloy is uneven. In the pulse mode, the thickness is relatively uniform and the formed thin film has a three-layer structure. The pulse mode creates less roughness, uniform thickness and improved corrosion resistance. Thus, the change of power mode from DC to pulse at 150 V decreases the surface roughness (Ra) from $0.9{\mu}m$ to $0.1{\mu}m$ and increases the corrosion resistance in rating number (RN) from 5 to 9.5. Our study shows that an optimal oxide film can be obtained with a pulse voltage of 150 V, which produces an excellent coating on the AZ91D casting alloy.

• Journal of Power Electronics
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• 제19권3호
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• pp.727-743
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• 2019

This paper presents a pulse-width modulation strategy to eliminate the common mode voltage (CMV) with reduced CMV spikes in multilevel inverters since a high CMV magnitude and its fast variations dv/dt result in bearing failure of motors, overvoltage at motor terminals, and electromagnetic interference (EMI). The proposed method only utilizes the zero CMV states in a space vector diagram and it is implemented by a carrier-based pulse-width modulation (CBPWM) method. This method is generalized for odd number levels of inverters including neutral-point-clamped (NPC) and cascaded H-bridge inverters. Then it is extended to the over-modulation mode. The over-modulation mode is implemented by using the two-limit trajectory principle to maintain linear control and to avoid look-up tables. Even though the CMV is eliminated, CMV spikes that can cause EMI and bearing current problems still exist due to the deadtime effect. As a result, the deadtime effect is analyzed. By taking the deadtime effect into consideration, the proposed method is capable of reducing CMV spikes. Simulation and experimental results verify the effectiveness of the proposed strategy.

• Journal of Power Electronics
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• 제17권4호
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• pp.1088-1096
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• 2017

Load variations on a distribution line result in voltage fluctuations at the point of common coupling (PCC). In order to keep the magnitude of the PCC voltage constant at its rated value and obtain zero voltage regulation (ZVR), a D-STATCOM is installed for voltage correction. Moreover, the ZVR mode of a D-STATCOM can also be used to balance the source current during unbalanced loading. For medium voltage and high power applications, a D-STATCOM is realized by the cascaded H-bridge topology. In the ZVR mode, the D-STATCOM may draw unbalanced current and in this process is required to handle different phase powers leading to deviations in the cluster voltages. Zero sequence voltage needs to be injected for ZVR mode, which creates circulating power among the phases of the D-STATCOM. The computed zero sequence voltage and the individual DC capacitor balancing controller help the DC cluster voltage follow the reference voltage. The effectiveness of the control scheme is verified by modeling the system in MATLAB/SIMULINK. The obtained simulations are further validated by the experimental results using a dSPACE DS1106 and five-level D-STATCOM experimental set up.

• Journal of Power Electronics
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• 제10권2호
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• pp.115-124
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• 2010

In this paper, a simple yet efficient auto mode-hop ripple control structure for buck converters with light load operation enhancement is proposed. The converter, which operates under a wide range of input and output voltages, makes use of a state-dependent hysteretic comparator. Depending on the output current, the converter automatically changes the operating mode. This improves the efficiency and reduces the output voltage ripple for a wide range of output currents for given input and output voltages. The sensitivity of the output voltage to the circuit elements is less than 14%, which is seven times lower than that for conventional converters. To assess the efficiency of the proposed converter, it is designed and implemented with commercially available components. The converter provides an output voltage in the range of 0.9V to 31V for load currents of up to 3A when the input voltage is in the range of 5V to 32V. Analytical design expressions which model the operation of the converter are also presented. This circuit can be implemented easily in a single chip with an external inductor and capacitor for both fixed and variable output voltage applications.

• 조명전기설비학회논문지
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• 제21권8호
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• pp.96-101
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• 2007

가스방전관(GDT)은 내부 정전용량이 작아서 통신용 서지보호기로 널리 사용되고 있는 소자이다. 하지만 가스방 전관의 동작개시를 위해서는 방전이 개시될 수 있는 충분한 전압과 시간이 필요하며, 이 동작개시전압은 피보호 회로가 서지에 민감한 장비일 경우 손상을 줄 수 있을 만큼 크므로 최근에는 조합 형태로 적용하는 경우가 대부분이다. 이렇게 초기 과전압이 상당 부분 존재하는 가스방전관에는 추가적으로 TVS나 필터 등을 통해 피크 전압을 제한해 주어야 한다. 본 논문에서는 공통모드 초크코일을 이용한 필터를 적용하여 공통모드와 차동모드의 조합회로를 구성하고, 주파수 대역이 다른 뇌임펄스 전압과 ring wave 전압을 인가하여 파형에 따른 조합회로의 특성을 확인하였다. 다단으로 보호되는 과정을 각각의 측정점에서 잔류전압을 측정하여 단계별로 적용한 SPD들이 어떻게 동작하는지를 실측데이터로 제시하였다. 각 단계의 잔류전압을 비교했을 때 공통모드에 비하여 차동모드에서 서지전압을 제한하는 성능이 보다 효과적이다.