• Title/Summary/Keyword: virtual circuit

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Estimation of Insulated-gate Bipolar Transistor Operating Temperature: Simulation and Experiment

  • Bahun, Ivan;Sunde, Viktor;Jakopovic, Zeljko
    • Journal of Power Electronics
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    • v.13 no.4
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    • pp.729-736
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    • 2013
  • Knowledge of a power semiconductor's operating temperature is important in circuit design and converter control. Designing appropriate circuitry that does not affect regular circuit operation during virtual junction temperature measurement at actual operating conditions is a demanding task for engineers. The proposed method enables virtual junction temperature estimation with a dedicated modified gate driver circuit based on real-time measurement of a semiconductor's quasi-threshold voltage. A simulation was conducted before the circuit was designed to verify the concept and to determine the basic properties and potential drawbacks of the proposed method.

A Web-based Virtual Experiment Kit for Digital Logic Circuits Using Java Applets (자바 애플릿을 이용한 웹 기반 디지털 논리회로 가상실험키트)

  • Kim, Dong-Sik;Kim, Ki-Woon;Park, Sang-Yun;Seo, Sam-Jun
    • Proceedings of the KIEE Conference
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    • 2003.07d
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    • pp.2717-2719
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    • 2003
  • In this paper, we developed an efficient virtual experiment kit with creative and interactive multimedia contents, which can be used to enhance the quality of education in the area of digital logic circuits. Since our virtual experiment kit is implemented to describe the on-campus laboratory, the learners can obtain similar experimental data through it. Also, our web-based virtual experiment kit is designed to enhance the efficiency of both the learners and the educators. The learners will be able to achieve high learning standard and the educators save time and labor. The virtual experiment is performed according to the following procedure: (1) Circuit Composition on the Bread Board (2) Applying Input Voltage (3) Output Measurements (4) Checkout of Experiment Results. Furthermore, the circuit composition on the bread board and its corresponding online schematic diagram are displayed together on the virtual experiment kit for the learner's convenience. Finally, we have obtained several affirmative effects such as reducing the total experimental hours and the damage rate for experimental equipments and increasing learning efficiencies as well as faculty productivity.

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Development of a Battery Model for Electric Vehicle Virtual Platform (전기 자동차 가상 플랫폼용 배터리 모델 개발 및 검증)

  • Kim, Sunwoo;Jo, Jongmin;Han, Jaeyoung;Kim, Sung-Soo;Cha, Hanju;Yu, Sangseok
    • Transactions of the Korean Society of Automotive Engineers
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    • v.23 no.5
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    • pp.486-493
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    • 2015
  • In this paper, a battery model for electric vehicle virtual platform was developed. A battery model consisted of a battery cell model and battery thermal management system. A battery cell model was developed based on Randles equivalent circuit model. Circuit parameters in the form of 3D map data was obtained by charge-discharge experiment of Li-Polymer battery in various temperature condition. The developed battery cell model was experimentally verified by comparing voltages. Thermal management system model was also developed using heat generator, heat transfer and convection model, and cooling fan. For verification of the developed battery model in vehicle level, the integrated battery model was applied in to EV(electric vehicle) virtual platform, and virtual driving simulation using UDDS velocity profile was conducted. The accuracy of the developed battery model has been verified by comparing the simulation results from EV platform with the experimental data.

Development of a Virtual Frisch-Grid CZT Detector Based on the Array Structure

  • Kim, Younghak;Lee, Wonho
    • Journal of Radiation Protection and Research
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    • v.45 no.1
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    • pp.35-44
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    • 2020
  • Background: Cadmium zinc telluride (CZT) is a promising material because of a high detection efficiency, good energy resolution, and operability at room temperature. However, the cost of CZT dramatically increases as its size increases. In this study, to achieve a large effective volume with relatively low cost, an array structure comprised of individual virtual Frisch-grid CZT detectors was proposed. Materials and Methods: The prototype consisted of 2 × 2 CZTs, a holder, anode and cathode printed circuit boards (PCBs), and an application-specific integrated circuit (ASIC). CZTs were used and the non-contacting shielding electrode method was applied for virtual Frisch-grid effect. An ASIC was used, and the holder and the PCBs were fabricated. In the current system, because the CZTs formed a common cathode, a total of 5 channels were assigned for data processing. Results and Discussion: An experiment using 137Cs at room temperature was conducted for 10 minutes. Energy and timing information was acquired and the depth of interaction was calculated by the timing difference between the signals of both electrodes. Based on obtained three-dimensional position information, the energy correction was carried out, and as a result the energy spectra showed the improvements. In addition, a Compton image was reconstructed using the iterative method. Conclusion: The virtual Frisch-grid CZT detector based on the array structure was developed and the energy spectra and the Compton image were successfully acquired.

(Signal Integrity Verification of a General VLSI Interconnects using Virtual-Straight Line Model) (가상 직선 모델을 사용한 일반적 VLSI 배선의 신호의 무결성 검증)

  • Jin, U-Jin;Eo, Yeong-Seon;Sim, Jong-In
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.39 no.2
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    • pp.146-156
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    • 2002
  • In this paper, a new virtual-straight line parameter determination methodology and fast time domain simulation technique for non-uniform interconnects are presented and verified. Time domain signal response of interconnects circuit considering the characteristic of non-linear transistor is performed by using model order reduction method. Since model order reduction method is peformed by using per unit length parameters, virtual- straight line parameters for non-uniform interconnects are determined. Its method is integrated into Berkeley SPICE and shown that time domain signal responses using proposed method have a good agreement with the results of conventional circuit simulator HSPICE. The proposed method can be efficiently employed in the high-performance VLSI circuit design since it can provide a fast and accurate time domain signal response of complicated multi - layer interconnects.

Virtual Path Routing Optimization in ATM Network (ATM 망의 가상경로 루팅 최적화)

  • 박구현
    • Journal of the Korean Operations Research and Management Science Society
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    • v.20 no.1
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    • pp.35-54
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    • 1995
  • Routing in ATM network is set up by combination of both virtual path routing and virtual channel routing. While virtual channel is similar concept to virtual circuit of data networks, virtual path is a special concept which is not used in traditional data networks. Virtual path can rearrange in structure and size by simply changing virtual path routing tables and giving the network the capability to eash allocate network resources according to the demand needs. This paper provides reconfiguration models of virtual path network which give the bandwidth of link and the routing path for each traffic class. The reconfiguration models are network optimization problems of multicommodity network flow type. The numerical examples are also included.

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Virtual Prototyping of Area-Based Fast Image Stitching Algorithm

  • Mudragada, Lakshmi Kalyani;Lee, Kye-Shin;Kim, Byung-Gyu
    • Journal of Multimedia Information System
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    • v.6 no.1
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    • pp.7-14
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    • 2019
  • This work presents a virtual prototyping design approach for an area-based image stitching hardware. The virtual hardware obtained from virtual prototyping is equivalent to the conceptual algorithm, yet the conceptual blocks are linked to the actual circuit components including the memory, logic gates, and arithmetic units. Through the proposed method, the overall structure, size, and computation speed of the actual hardware can be estimated in the early design stage. As a result, the optimized virtual hardware facilitates the hardware implementation by eliminating trail design and redundant simulation steps to optimize the hardware performance. In order to verify the feasibility of the proposed method, the virtual hardware of an image stitching platform has been realized, where it required 10,522,368 clock cycles to stitch two $1280{\times}1024$ sized images. Furthermore, with a clock frequency of 250MHz, the estimated computation time of the proposed virtual hardware is 0.877sec, which is 10x faster than the software-based image stitch platform using MATLAB.

Scheduling Performance Evaluation and Testing Functions of a Connection-Oriented Packet Switching Processor (연결지향형 패킷교환 처리기의 스케줄링 성능평가 및 시험 방안 연구)

  • Kim, Ju-Young;Choi, Ki-Seok
    • Journal of Korean Institute of Industrial Engineers
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    • v.40 no.1
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    • pp.135-139
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    • 2014
  • In a connection-oriented packet switching network, the data communication starts after a virtual circuit is established between source and destination. The virtual circuit establishment time includes the queue waiting times in the direction from source to destination and the other way around. We use this two-way queueing delay to evaluate scheduling policies of a packet switching processor through simulation studies. In this letter, we also suggest user testing functions for the packet switching processor to manage virtual circuits. By detecting error causes, the user testing helps the packet switching processor provide reliable connection-oriented services.

Clamping force control of injection molding machine using 2-way cartridge valve based logic circuit (2-방향 카트리지 밸브 기반 로직회로에 의한 사출성형기의 형체력 제어)

  • Cho, Seung Ho
    • Journal of Drive and Control
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    • v.13 no.2
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    • pp.51-58
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    • 2016
  • The present study deals with the issue of clamping force control of an injection molding machine using 2-way cartridge valve based logic circuit. The operating principle for the cartridge valve is described with its construction and static opening behavior. Basic module circuits are designed first and analysed according to the basic functions. Then they are combined with a virtual design model for the clamping mechanism to simulate the control performance of the overall system. The backlash inherent in the mechanism is considered while evaluating the time-delay in the process of clamping force build-up. The effects of a couple of design parameters in backlash, i.e., interval and stiffness have been demonstrated in the time-domain.

Production of Virtual Electrical Circuit Practice Education Contents based on Mixed Reality using Meta Quest Pro (메타 퀘스트 프로를 활용한 혼합현실 기반 가상 전기회로 실습교육 콘텐츠 제작)

  • Sumin Kong;Jongseon Kim;Goohyun Jeong;Gyeongbin Roh;Esther Park;Yunsik Cho;Jinmo Kim
    • Journal of the Korea Computer Graphics Society
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    • v.30 no.3
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    • pp.61-69
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    • 2024
  • Mixed reality(MR) technology combines the advantages of virtual reality(VR) and augmented reality(AR) technology, allowing MR users to interact with virtual objects against the background of the real world. In addition, since virtual objects interact with the real world, users can experience a higher immersion. This study proposes electric circuit practical training content using Meta Quest Pro to produce immersive MR content based on reality. To this end, first, the development process for producing MR content by linking Meta Quest Pro equipment with the Unity 3D engine is organized. Then, based on the traditional electric circuit practical training method used in elementary school science classes, virtual electric circuit practical training content with the same training method and operation process is produced based on MR. Finally, survey experiments are conducted to analyze the presence and experience of the MR-based educational environment provided using the produced content. Through this, the usability of the proposed practical training content is evaluated and future research directions are suggested.