• 대한전기학회:학술대회논문집
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• 대한전기학회 2009년도 제40회 하계학술대회
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• pp.1929_1930
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• 2009

Fully embedded tunable bandpass filter (BPF) with inductive coupling circuits is newly designed and demonstrated for UHF TV tuner ranged from 500MHz to 900MHz receivers. Conventional RF tuning circuit with an electromagnetic coupled tunable filter has several problems such as large size, high volume, and high cost, since the electromagnetic coupled filter is comprised of several passive components and air core inductors to be assembled and controlled manually. To address these obstacles, compact tunable filter with inductive coupling circuit was embedded into low cost organic package substrate. The embedded filter was optimally designed to have high performance by using high Q spiral stacked inductors, high dielectric $BaTiO_3$ composite MIM capacitors, varactor diodes. It exhibited low insertion loss of approximately -2dB, high return loss of below -10dB, and large tuning range of 56.3%. It has an extremely compact size of $3.4{\times}4.4{\times}0.5mm^3$.

• 전자공학회논문지
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• 제49권10호
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• pp.142-147
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• 2012

본 논문에서는 다이나믹 주파수 스케일링 (DFS) 카운터를 사용하여 코오스, 파인 조정 기능을 갖는 CMOS 듀티 사이클 보정회로를 제시한다. DFS 카운터는 디지털-아날로그 컨버터의 비트 스위칭 글리치를 감소시키기 때문에 제안하는 CMOS 듀티 사이클 보정회로의 듀티 보정 범위를 증가시키고 지터 특성을 개선한다. 제안하는 회로는 0.18-${\mu}m$ CMOS 공정을 이용하여 설계되었다. 0.5-1.5GHz의 넓은 동작 주파수와 25-75%의 넓은 듀티 사이클 보정 범위 내에서 측정된 최대 출력 듀티 사이클 에러는 ${\pm}1.1%$이다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제8권4호
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• pp.295-301
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• 2008

Recently, the demand on mm-wave (millimeter-wave) applications has increased dramatically. While circuits operating in the mm-wave frequency band have been traditionally implemented in III-V or SiGe technologies, recent advances in Si MOSFET operation speed enabled mm-wave circuits realized in a Si CMOS technology. In this work, a 58 GHz CMOS LC cross-coupled VCO (Voltage Controlled Oscillator) was fabricated in a $0.13-{\mu}m$ Si RF CMOS technology. In the course of the circuit design, active device models were modified for improved accuracy in the mm-wave range and EM (electromagnetic) simulation was heavily employed for passive device performance predicttion and interconnection parasitic extraction. The measured operating frequency ranged from 56.5 to 58.5 GHz with a tuning voltage swept from 0 to 2.3 V. The minimum phase noise of -96 dBc/Hz at 5 MHz offset was achieved. The output power varied around -20 dBm over the measured tuning range. The circuit drew current (including buffer current) of 10 mA from 1.5 V supply voltage. The FOM (Figure-Of-Merit) was estimated to be -165.5 dBc/Hz.

• 센서학회지
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• 제31권2호
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• pp.115-119
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• 2022

A readout circuit for a mercury-cadmium-telluride (MCT)-amplified mid-wave infrared (IR) photodetector was realized and applied to noncontact chemical agent detectors based on a quantum cascade laser (QCL). The QCL emitted 250 times for each wavelength in 0.2-㎛ steps from 8 to 12 ㎛ with a frequency of 100 kHz and duty ratio of 10%. Because of the nonconstant QCL emission power during on-duty, averaging the photodetector signals is essential. Averaging can be performed in digital back-end processing through a high-speed analog-to-digital converter (ADC) or in analog front-end processing through an integrator circuit. In addition, it should be considered that the 250 IR data points should be completely transferred to a PC during each wavelength tuning period of the QCL. To average and minimize the IR data, we designed a readout circuit using the analog front-end processing method. The proposed readout circuit consisted of a switched-capacitor integrator, voltage level shifter, relatively low-speed analog-to-digital converter, and micro-control unit. We confirmed that the MCT photodetector signal according to the QCL source can be accurately read and transferred to the PC without omissions.

• Journal of electromagnetic engineering and science
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• 제4권3호
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• pp.107-112
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• 2004

In this paper, the phase noise of 900 MHz VCO is improved using modified strip line square ring resonator. In order to demonstrate the phase noise improvement of the proposed VCO, the same circuit was manufactured using shorted-circuit resonator. In condition of the same bias current, the phase noise of the proposed VCO with modified square ring resonator is suppressed by 7 dB as - 103 dBc/Hz at 100 kHz offset compared to the conventional VCO with short-circuit resonator. From the proposed VCO, we achieved output power of - 4.8 dBm, harmonics suppression of 16 dB, and tuning bandwidth of 100 MHz. The proposed VCO consumed 5 mA at 3 V, and its size is 1.2 cm ${\times}$ 1.0 cm.

• 한국소음진동공학회:학술대회논문집
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• 한국소음진동공학회 2008년도 춘계학술대회논문집
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• pp.77-80
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• 2008

In this paper the electromagnetic shunt damper was newly employed for vibration suppression of the flexible structures. The electromagnetic shunt damper consists of a coil and a permanent magnet. The ends of the coil were connected to the RLC shunt circuit. The numerical solutions of resonant frequency of the shunt circuits were calculated by using Pspice. The vibration and damping characteristics of the flexible beams with the electromagnetic shunt damper were investigated by tuning the circuit parameters. Also, the effect of the magnetic intensity on the shunt damping was studied with the variation of the gap between the aluminum beam and the permanent magnet. Present results show that the magnet shunt damper can be successfully applied to reduce the vibration of the flexible structures.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 추계종합학술대회 논문집
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• pp.697-700
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• 1999

This Paper presents the design, fabrication, analysis of the measured date of a voltage controlled oscillator(VCO) for the application of Personal Communication Systems. Main VCO circuit consists of self biased emitter resonating circuit with microstrip line resonator on FR4 epoxy substrate. A varactor diode is used for 90MHz frequency tuning with center frequency of 1635MHz Phase noise of -114.67㏈C/Hz at 100KHz off set has been achieved with 3.3 V supply. The size of the fabricated VCO circuit is 1.25 cm$\times$ 1.25 cm.

• 한국소음진동공학회:학술대회논문집
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• 한국소음진동공학회 2003년도 추계학술대회논문집
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• pp.624-629
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• 2003

In this paper, broadband shunt technique for increasing transmission loss is experimentally investigated. Piezoelectric shunt damping is studied using resonant shunt circuit and negative capacitor shunt circuit. A resonant shunt circuit is implemented by using a resistor and inductor. Negative Capacitor shunt damping is similar in nature to resonant shunt damping techniques, as a single piezoelectric material is used to dampen multi-mode. Performance of both methods is experimentally studied for noise reduction. This is based upon SAE J1400 test method and a transmission loss measurement system is provided for it. This paper will present the test setup fer transmission loss measurement and the tuning procedure of shunt circuits. Finally the results of sound transmission tests will be shown.

• International Journal of Aeronautical and Space Sciences
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• 제7권1호
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• pp.54-64
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• 2006

To augment weakly damped lag mode stability of a hingeless helicopter rotor blade in hover, piezoelectric shunt with a resistor and an inductor circuits for passive damping has been studied. A shunted piezoceramics bonded to a flexure of rotor blade converts mechanical strain energy to electrical charge energy which is dissipated through the resistor in the R-L series shunt circuit. Because the fundamental lag mode frequency of a soft-in-plane hingeless helicopter rotor blade is generally about 0.7/rev, the design frequency of the blade system with flexure sets to be so. Experimentally, the measured lag mode frequency is 0.7227/rev under the short circuit condition. Therefore the suppression mode of this passive damping vibration absorber is adjusted to 0.7227/rev. As a result of damping enhancement using passive control, the passive damper which consists of a piezoelectric material and shunt circuits has a stabilizing effect on inherently weakly damped lag mode of the rotor blades, at the optimum tuning and resistor condition.

• 전자공학회논문지C
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• 제34C권12호
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• pp.20-27
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• 1997

In this paper, a multiplying digital-to-analog converter (MDAC) circuit for low-power high-resolution CMOS algorithmic A/D converters (ADC's) is proposed. The proposed MDAC is designed to operte properly at a supply at a supply voltge between 3 V and 5 V and employs an analog0domain power reduction technique based on a bias switching circuit so that the total power consumption can be optimized. As metal-to-metal capacitors are implemented as frequency compensation capacitors, opamps' performance can be varied by imperfect process control. The MDAC minimizes the effects by the circuit performance variations with on-chip tuning circuits. The proposed low-power MDAC is implementd as a sub-block of a 10-bit 200kHz algorithmic ADC using a 0.6 um single-poly double-metal n-well CMOS technology. With the power-reduction technique enabled, the power consumption of the experimental ADC is reduced from 11mW to 7mW at a 3.3V supply voltage and the power reduction ratio of 36% is achieved.