• Structural Engineering and Mechanics
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• 제11권4호
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• pp.443-460
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• 2001

This paper presents an effective application of a variable-node axisymmetric solid element designated as AQV (Axisymmetric Quadrilateral Variable-node element). The variable-node element with physical midside nodes helps to overcome some problems in connecting the different layer patterns on a quadrilateral mesh in the adaptive h-refinement. This element alleviates the necessity of imposing displacement constraints on irregular (hanging) nodes in order to enforce the inter-element compatibility. Therefore, the elements with variable mid-side nodes can be used effectively in the local mesh refinement for the axisymmetric structures which have stress concentrations. A modified Gaussian quadrature should be adopted to evaluate the stiffness matrices of the variable-node elements mainly because of the slope discontinuity of assumed displacement within the elements. Some numerical examples show the usefulness of variable-node axisymmetric elements in the practical application.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2011년도 추계학술대회
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• pp.26-27
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• 2011

This paper focuses on the zero-voltage/zero current transition voltage equalization circuit for the series connected battery cell. By adding auxiliary resonant cells at the main switching devices such as MOSFET or IGBT, zero current switching is achieved and turned off loss of switching elements is eliminated and by the voltage/second balancing of the inductor, zero voltage switching can be applied to switching element. Transformer coupling between battery cells and ZVZCT (Zero Voltage Zero Current Transition) switching method allow the fast balancing speed and high frequency operation, which reduces the size and weight of the circuit. The validity of the battery equalization is further verified using simulation involving four lithium-ion battery cell models.

• Journal of Power Electronics
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• 제9권5호
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• pp.708-717
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• 2009

In this paper a new zero voltage transition PWM bridgeless PFC is introduced. The auxiliary circuit provides soft switching condition for all semiconductor devices. Also, in the resonant path of the auxiliary circuit, only two semiconductor devices exist. Therefore the resonant conduction losses are low. Furthermore, the auxiliary circuit semiconductor elements consist of only one diode and one switch. The proposed auxiliary circuit is applied to a bridgeless PFC converter to further reduce conduction and switching losses. In this paper, the operating modes of this converter are explained and the resulting ideal and simulation waveforms are shown. The presented experimental results justify the theoretical analysis.

• Structural Engineering and Mechanics
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• 제43권3호
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• pp.349-370
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• 2012

Variable-node finite element families, termed (4 + k + l + m + n)-node elements with an arbitrary number of nodes (k, l, m, and n) on each of their edges, are developed based on the generic point interpolation with special bases having slope discontinuities in two-dimensional domains. They retain the linear interpolation between any two neighboring nodes, and passes the standard patch test when subdomain-wise $2{\times}2$ Gauss integration is employed. Their shape functions are automatically generated on the master domain of elements although a certain number of nodes are inserted on their edges. The elements can provide a flexibility to resolve nonmatching mesh problems like mesh connection and adaptive mesh refinement. In the case of adaptive mesh refinement problem, so-called "1-irregular node rule" working as a constraint in performing mesh adaptation is relaxed by adopting the variable-node elements. Through several examples, we show the performance of the variable-node finite elements in terms of accuracy and efficiency.

• 대한용접접합학회:학술대회논문집
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• 대한용접접합학회 2004년도 춘계 학술발표대회 개요집
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• pp.270-272
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• 2004

유한요소해석에서 두께가 얇은 구조물의 기계적 해석의 경우 shell요소가 효과적이라는 것은 널리 알려져 있다. 그러나 일반적인 shell요소는 두께방향의 응력 및 변형을 정확히 표현하지 못하고 solid요소와 동시에 사용될 경우 특별한 transition 요소를 필요로 하는 단점이 있다. (중략)

• 한국자기학회:학술대회 개요집
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• 한국자기학회 2008년도 Asian Magnetics Conference
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• pp.276.2-276.2
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• 2008

• 마이크로전자및패키징학회지
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• 제8권2호
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• pp.37-42
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• 2001

The BGA package has been the area array package of choice for several years. Recently, the transition has been to finer pitch configurations called Chip Scale Packages (CSP). Several of these package types are available at 0.5 mm pitch. requiring surface mount assemblers to evaluate and optimize various elements of the assembly process. This presentation describes the issues associated with making the transition from BGA to CSP assembly. Areas addressed will include the accuracy of pick and place equipment, printed wiring board lines and spaces, PWB vias, in-circuit test issues, solder paste printing, moisture related factors, rework and reliability. The transition to 0.5 mm pitch requires careful evaluation of the board design, solder paste selection, stencil design and component placement accuracy. At this pitch, ball and board pad diameters can be as small as 0.25 mm and 0.20 mm respectively. Drilled interstitial vias are no longer possible and higher ball count packages require micro-via board technology. The transition to CSP requires careful evaluation of these issues. Normal paste registration and BGA component tolerances can no longer achieve the required process levels and higher accuracy pick and place machines need to be implemented. This presentation will examine the optimization of these critical assembly operations, contrast the challenges at 0.5 mm and also look at the continuation of the process to incorporate smaller pitch flip chip devices.

• 한국주조공학회지
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• 제21권1호
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• pp.15-23
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• 2001

The changes in the microstructures and $D0_3{\leftrightarrow}B2$ transition temperature were investigated for Fe-30at.%AI-5at.%Cr alloy with the ordered $D0_3$, structure when Ti, Hf and Zr were added respectively. The addition of Cr has no effect on the microstructure. However, as the amount of Ti addition increased, the grain size became smaller. Addition of Ti+Hf, Ti+Zr and Ti+Hf+Zr also showed the similar effect. When 20at.% of Ti was added, the second phase precipitates on the substrate. The addition of Cr, Hf and Zr alone has no effect on $D0_3{\leftrightarrow}B2$ transition temperature. However, as the amount of Ti addition increased by 5, 10, 15 and 20at.%, the transition temperatures showed 929, 930, 960 and $930^{\circ}C$ respectively.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2001년도 Proceedings of 6th International Joint Symposium on Microeletronics and Packaging
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• pp.27-34
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• 2001

The BGA Package has been the area array package of choice for several rears. Recently, the transition has been to finer pitch configuration called Chip Scale Packages (CSP). Several of these package types are available at 0.5 mm pitch, requiring surface mount assemblers to evaluate and optimize various elements of the assembly process. This presentation describes the issues associated with making the transition from BGA to CSP assembly. Areas addressed will include the accuracy of pick and piece equipment, printed wiring board lines and spaces, PWB vias, in-circuit test issues, solder paste printing, moisture related factors, rework and reliability. The transition to 0.5 mm pitch requires careful evaluation of the board design, solder paste selection, stencil design and component placement accuracy. At this pitch, ball and board pad diameters can be as small as 0.25 mm and 0.20 mm respectively. Drilled interstitial vias are no longer possible and higher ball count packages require micro-via board technology. The transition to CSP requires careful evaluation of these issues. Normal paste registration and BGA component tolerances can no longer achieve the required process levels and higher accuracy pick and place machines need to be implemented. This presentation will examine the optimization of these critical assembly operations, contrast the challenges at 0.5 mm and also look at the continuation of the process to incorporate smaller pitch flip chip devices.

• 한국재료학회지
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• 제7권3호
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• pp.218-223
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• 1997

과냉각액체구역(${\Delta}T_{x}=T_{x}-T_{g}$)을 갖는 $Fe_{80}P_{10}C_{6}B_{4}$ 조성에 천이금속(Ti, Zr, Hf, V, Nb, Ta, Cr, Mo, W, Mn, Co, Ni, Pd, Pt및 Cu)를 첨가하여 이들 원소가 유리화온도($T_{g}$), 결정화온도($T_{x}$) 및 과냉액체구역 (${\Delta}T_{x}$)에 미치는 영향에 \ulcorner여 조사하였다. $Fe_{80}P_{10}C_{6}B_{4}$ 합금의 ${\Delta}T_{x}$ 값은 27K였으나 이 합금에 Hf, Ta 및 Mo을 각각 4at%첨가하면 그 값이 40k 이상으로 증가하였다. 이같은 ${\Delta}T_{x}$ 값의 증가는 유리화온도($T_{g}$의 상승보다 결정화온도($T_{x}$)의 상승폭이 크기 때문이다. $T_{g}$ 및 $T_{x}$는 외각전자밀도(e/a)가 약 7.38에서 7.05로 감소할수록 상승하였다. e/a의 감소는 천이금속과 다른 구성원소(반금속)사이의 상호결합상태를 의미한다. 즉 $T_{g}$ 및 $T_{x}$의 상승은 강한 상호결합력에 기인하는 것으로 사료된다.