• ETRI Journal
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• v.28 no.2
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• pp.175-181
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• 2006

A new CMOS voltage-controlled fully-differential transconductor is presented. The basic structure of the proposed transconductor is based on a four-MOS transistor cell operating in the triode or saturation region. It achieves a high linearity range of ${\pm}\;1\;V$ at a 1.5 V supply voltage. The proposed transconductor is used to realize a new fully-differential Gm-C low-pass filter with a minimum number of transconductors and grounded capacitors. PSpice simulation results for the transconductor circuit and its filter application indicating the linearity range and verifying the analytical results using $0.35\;{\mu}m$ technology are also given.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.803-806
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• 1998

A novel bipolar circuit technique for realizing linear transconductor is described. The proposed circuit has superior linearity and temperature characteristics when compared with the conventional transconductor. The theory of operation is presented and computer simulation results are used to verify theoretical predections. The simulation results show close agreement between predicted behaviours and experimental performances.

• Proceedings of the IEEK Conference
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• 2002.07c
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• pp.1871-1874
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• 2002

This paper describes a realization of a linearized transconductor using a CMOS complementary pair. The proposed transconductor is driven by a grounded signal source. How to cancel the offset current is described, Moreover , how to control the transconductance is described . It is shown that power consumption of the proposed transconductor without the control circuit is about half as low as that of the conventional Wang’s OTA through computer simulation.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.37 no.1
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• pp.40-48
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• 2000

1A novel bipolar linear transconductor and its application to operational transconductance amplifier(OTA) for low-voltage low-power signal processing is proposed. The transconductor consists of a npn differential-pair with emitter degeneration resistor and a pnp differential-pair connected to the npn differential-pair in cascade. The bias current of the pnp differential-pair is used with the output current of the npn differential-pair for wide linearity and temperature stability. The OTA consists of the linear transconductor and a translinear current cell followed by three current mirrors. The proposed transconductor has superior linearity and low-voltage low-power characteristics when compared with the conventional transconductor. The experimental results show that the transconductor with transconductance of 50 ${\mu}S$ has a linearity error of less than ${\pm}$0.06% over an input voltage range from -2V to +2V at supply voltage ${\pm}$3V. Power dissipation of the transconductor was 2.44 mW. A prototype OTA with a transconductance of 25 ${\mu}S$ has been built with bipolar transistor array. The linearity of the OTA was same as the proposed transconductor. The OTA circuit also exhibits a transconductance that is linearly dependent on a bias current varying over four decades with a sensitivity of 0.5 S/A.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.967-970
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• 1999

A novel linear transconductor for low-voltage low-power signal processing is proposed. The transconductor consists of a pnp differential-pair and a npn differential-pair which are biased by local negative feedback. The simulation results show that the transcondcutor with transconductance of 50 $mutextrm{s}$ has a linearity error of 0.05% and the power dissipation is 2.44 ㎽ over an input linear range from -2V to +2V at supply voltage $\pm$3V.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.56 no.2
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• pp.424-427
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• 2007

A fully differential transconductor using the series composite transistor is proposed. Simulation results show that THD is less than 1.2% for the differential input signal of up to $1.5V_{p-p}$ when the input signal frequency is 10MHz. i he proposed transconductor is used to design a third-order elliptic Gm-C lowpass filter with 138kHz cutoff frequency for ADSL Tx filter. The design procedure is based on signal flow graph(SFG) of a doubly-terminated LC ladder filter by means of fully differential transconductors and capacitors. The filter is fabricated and measured with a $0.35{\mu}m$ CMOS process.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.38 no.4
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• pp.20-30
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• 2001

A novel 200 MHz CMOS transconductor using translinear cells is proposed. The proposed transconductor consists of voltage followers and current followers based on translinear cells and a resistor. For wide applications, a single-input single-output, a single-Input differential-output, and a fully-differential transconductor are systematically designed, respectively. The theory of operation is described and computer simulation results are used to verify theoretical predictions. The results show that the fully-differential transconductor has a linear input voltage range of ${\pm}2.7$ V, a 3 dB frequency of 200 MHz, and a temperature coefficient of less than 41 $ppm/^{\circ}C$ at supply voltages of ${\pm}3$ V. In order to certify the applicability of the fully-differential transconductor, A ladder-type 3th-order cllitic low pass filter is also designed based on the inductance simulation method. The filter has a ripple bandwidth of 22 MHz, a pass-band ripple of 0.36 dB, and a cutoff frequency of 26 MHz.

• Proceedings of the KIEE Conference
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• 2001.11c
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• pp.348-351
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• 2001

In this paper, the Gm-C filter for low voltage and low power applications using a fully-differential transconductor is presented. The designed transconductor using the series composite transistors and the low voltage composite transistors has wide input range at low supply voltage. A negative resistor load (NRL) technology for high DC gain of the transconductor is employed with a common mode feedback(CMFB). As a design example, the third-order Elliptic lowpass filter is designed. The designed filter is simulated and examined by HSPICE using TSMC $0.35{\mu}m$ CMOS n-well parameters. The simulation results show 138kHz cutoff frequency and 11.05mW power dissipation with a 3.3V supply voltage.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.547-548
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• 2008

Linearity improvement technique of transconductor is presented in the paper. In order to certify the linearity improvement of proposed transconductor, the 3rd-order Elliptic low-pass Gm-C filter which provides 5MHz cutoff is implemented by using the transconductor. According to the IIP3 measurement result of filters, proposed filter has higher IIP3 than normal source-degeneration filter; the In-band IIP3 of proposed and normal filter are 10.1 dBm and 7.5 dBm respectively. The filter is fabricated in 1P6M $0.18-{\mu}m$ CMOS while consuming the 3.3mW with 1.8 Vdd. The in-band input-referred noise voltage is $62.3{\mu}Vrms$ and the SFDR is 54.1 dB.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.257-260
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• 2000

In this paper, a Gm-C filter for low voltage and low power applications using a fully-differential transconductor is presented. The designed transconductor using the series composite transistors and the low voltage composite transistors has wide input range at low supply voltage. A negative resistor load (NRL) technology for high DC gain of the transconductor is employed with a common mode feedback (CMFB). As a design example, the third-order Elliptic lowpass filter is designed. The designed filter is simulated and examined by HSPICE using 0.25${\mu}{\textrm}{m}$ CMOS n-well parameters. The simulation results show 105MHz cutoff frequency and 2.4㎽ power dissipation with a 2.5V supply voltage.