• The Transactions of the Korean Institute of Electrical Engineers D
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• v.50 no.5
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• pp.241-246
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• 2001

The conventional stethoscope can not store its stethoscopic sounds. Therefor a doctor diagnoses a patient with instantaneous stethoscopic sounds at that time, and he can not remember the state of the patient's stethoscopic sounds on the next. This prevent accurate and objective diagnosis. If the electronic stethoscope, which can store the stethoscopic sound, is developed, the auscultation will be greatly improved. This study describes an amplifier for electronic stethoscope system that can extract heart sounds of fetus as well as adult and alow us hear and record the sounds. Using the developed stethoscopic amplifier, clean heart sounds of fetus and adult can be heard in noisy environment, such as a consultation room of a university hospital, a laboratory of a university. Surprisingly, the heart sound of a 22-week fetus was heard through the developed electronic stethoscope. Pitch detection experiments using the detected heart sounds showed that the signal represents distinct periodicity. It can be expected that the developed electronic stethoscope can substitute for conventional stethoscopes and if proper analysis method for the stethoscopic signal is developed, a good electronic stethoscope system can be produced.

• Journal of electromagnetic engineering and science
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• v.16 no.4
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• pp.199-205
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• 2016

We present a novel schematic using a 3-dB coupler to transmit radiofrequency (RF) power to two receivers selectively. Whereas previous multiple receiver supporting schemes used hardware-switched methods, our scheme uses a soft power-allocating method, which has the advantage of variable power allocation in real time to each receiver. Using our scheme, we can split the charging area and focus the RF power on the targeted areas. We present our soft power-allocating method in three main points. First, we propose a new power distribution hardware structure using a FPGA (field-programmable gate array) and a 3-dB coupler. It can reconfigure the transmitting power to two receivers selectively using accurate FPGA-controlled signals with the aid of software. Second, we propose a power control method in our platform. We can variably control the total power of transmitter using the DC bias of the drain input of the amplifier. Third, we provide the possibility of expansion in multiple systems by extending these two wireless power transfer systems. We believe that this method is a new approach to controlling power amplifier output softly to support multiple receivers.

• Korean Journal of Optics and Photonics
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• v.14 no.5
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• pp.530-534
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• 2003

A novel all-optical NOR gate is proposed and demonstrated for the first time by use of gain saturation in a semiconductor optical amplifier (SOA). It is operated by the nonlinearity of the SOA gain. Hence, to obtain sufficient gain saturation of the SOA, pump signals are amplified by an Er-doped fiber amplifier at the input of the SOA. The operation characteristics of the all-optical NOR gate are successfully measured at 10 Gbit/s.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.1
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• pp.68-73
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• 2002

This paper presents the implementation of wide-band RFIC amplifier operating from near 50 MHz to 3 GHz using Tachyonics SiGe HBT foundry. Voltage shunt feedback is used for the flat gain and the broad band impedance matching. Initial design parameters are calculated through the low frequency small signal analysis. Since the HBT model was not available at the design time, discrete tuning board was made for fine adjustment in the low frequency range. Fabricated amplifier shows 12 dB gain with 1 dB fluctuation and P1 dB reaches 15 dBm at 850 MHz.

• Nuclear Engineering and Technology
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• v.56 no.1
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• pp.189-194
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• 2024

This paper presents a radiation-hardened-by-design preamplifier that utilizes a self-compensation technique with a charge-sensitive amplifier (CSA) and replica for total ionizing dose (TID) effects. The CSA consists of an operational amplifier (OPAMP) with a 6-bit binary weighted current source (BWCS) and feedback network. The replica circuit is utilized to compensate for the TID effects of the CSA. Two comparators can detect the operating point of the replica OPAMP and generate appropriate signals to control the switches of the BWCS. The proposed preamplifier was fabricated using a general-purpose complementary metal-oxide-silicon field effect transistor 0.18 ㎛ process and verified through a test up to 230 kGy (SiO₂) at a rate of 10.46 kGy (SiO₂)/h. The code of the BWCS control circuit varied with the total radiation dose. During the verification test, the initial value of the digital code was 39, and a final value of 30 was observed. Furthermore, the preamplifier output exhibited a maximum variation error of 2.39%, while the maximum rise-time error was 1.96%. A minimum signal-to-noise ratio of 49.64 dB was measured.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.6
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• pp.854-862
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• 1993

All of the CMOS analog and analog-digital systems have composed with several basic circuits, and among them, a important block, the amplifier part can affect the system's performance, Therefore, according to the uses in the system, the amplifier circuit have designed as various architectures (high-gain, low-noise, high-speed circuit, etc...). In this paper, we have proposed a new CMOS differential amplifier circuit. This circuit is differential to single ended input stage comprised of CMOS complementary gain circuits having internally biasing configurations. These architectures can be achieved the high gain and reduced the transistors for biasing. As a results of SPICE simulation with the standard $1.5{\mu}m$ processing parameter, the gain of the proposed circuit have a doubly value of the typical circuit's while maintaining other characteristics(phase margin, offset, etc...). And the proposed circuit is applicated in a simple CMOS comparator which has the settling time in 7nsec(CL=1pF) and the igh output swing $({\pm}4.5V)$.

• Proceedings of the Materials Research Society of Korea Conference
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• 2003.11a
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• pp.136-136
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• 2003

In fiber optic networks, system size and cost can be significantly reduced by development of optical components through planar optical waveguides. One important step to realize the compact optical devices is to develop planar optical amplifier to compensate the losses in splitter or other components. Planar amplifier provides optical gain in devices less than tens of centimeters long, as opposed to fiber amplifiers with lengths of typically tens of meters. To achieve the same amount of gain between the planar and fiber optical amplifier, much higher Er doping levels responsible for the gain than in the fiber amplifier are required due to the reduced path length. These doping must be done without the loss of homogeniety to minimize Er ion-ion interactions which reduce gain by co-operative upconversion. Sol-gel process has become a feasible method to allow the incorporation of Er ion concentrations higher than conventional glass melting methods. In this work, Er-doped $SiO_2$-A1$_2$ $O_3$ films were prepared by two different method via sol -Eel process. Tetraethylorthosilicate(TEOS)/aluminum secondary butoxide [Al (OC$_4$ $H_{9}$)$_3$], methacryloxypropylcnethoxysaane(MPTS)/aluminum secondary butofde [Al(OC$_4$ $H_{9}$)$_3$] systems were used as starting materials for hosting Er ions. Er-doped $SiO_2$-A1$_2$ $O_3$ films obtahed after heat-treating, coatings on Si substrate were characterized by X-ray din action, FT-IR, and N-IR fluorescence spectroscopy. The luminescence properties for two different processing procedure will be compared and discussed from peak intensity and life time.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.4
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• pp.440-446
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• 2011

In this paper, a X-band 50 W pulsed solid state power amplifier(SSPA) is designed and fabricated for radar systems. The SSPA consists of a driver amplifier, a high power amplifier, and a pulse modulator. The high power stage employes four 25 W GaAs FET to deliver 50 W at X-band. To meet the stringent target specification for the SSPA, we used a new hybrid pulse switching method, which combine the advantage of pulse modulation and bias switching method. The fabricated SSPA shows a power gain of 44.2 dB, an output power of 50 W over a 1.12 GHz bandwidth. Also, pulse droop < 1 dB meet the design goals and a rise/fall time is less than 12.45 ns. Fabricated X-band pulsed SSPA size is compact with overall size of $150{\times}105{\times}30\;mm^3$.

• Progress in Medical Physics
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• v.13 no.3
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• pp.156-162
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• 2002

In this study, we attempted in preparing high precision EEG measuring equipment. To measure EEG in high efficiency, pre-amplifier should get high performance common mode rejection ratio. Also, separation amplifier is essential to eliminate common line noise. So, our study were pointed at elevating the efficiency of eliminating noise, user safety and low noise characteristics. Prepared high precision pre-amplifier for EEG was A/D converted to automatically classify $\alpha$ wave, $\beta$ wave and $\theta$ wave. And converted data were Fast Fourier Transformed with real time DSP (Digital Signal Processing). Clinical demonstrations were carried out with healthy students, aged between 20 to 26 who has no histories of illness. To recognize the efficiency of the EEG, prepared EEG were used with MS equipment in low stimulated state and high stimulated state. Then, we studied at the effect of sensitivity on brain wave. From this study, it is known that our EEG equipment is efficient in sensitivity evaluation and suitable stimulations for each psychological state are required.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.8 no.4
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• pp.310-318
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• 2015

In this paper, dual-port eFuse OTP (one-time programmable) memory cells with smaller cell sizes are used, a single VREF (reference voltage) is used in the designed eFuse OTP IP (intellectual property), and a BL (bit-line) sensing circuit using a S/A (sense amplifier) based D F/F is proposed. With this proposed sensing technique, the read current can be reduced to 3.887mA from 6.399mA. In addition, the sensing resistances of a programmed eFuse cell in the program-verify-read and read mode are also reduced to $9k{\Omega}$ and $5k{\Omega}$ due to the analog sensing. The layout size of the designed 32-bit eFuse OTP memory is $187.845{\mu}m{\times}113.180{\mu}m$ ($=0.0213{\mu}m2$), which is confirmed to be a small-area implementation.