• Journal of Sensor Science and Technology
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• v.14 no.1
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• pp.28-32
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• 2005

In this paper, a CMOS integrated detection circuit for capacitive type fingerprint sensor signal processing is described. We designed a detection circuit of charge-sharing sensing scheme. The proposed detection circuit increases the voltage difference between a ridge and valley. The test chip is composed of $160{\times}192$ array sensing cells (12 by $12.7{\;}mm^{2}$). The chip was fabricated on a 0.35 m standard CMOS process. Measured difference voltage between a ridge and valley was 0.95 V.

• Proceedings of the KIEE Conference
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• 1996.07a
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• pp.80-82
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• 1996

This paper deals with the effects of the volume of thermal expansion chamber on the interrupting performance in thermal expansion type 25.8kV 25kA gas circuit breaker. Model interrupters with 5 type thermal expansion chamber were designed and manufactured. Short-circuit tests were carried out for those model interrupters with 25kA breaking current. Pressure rise in the expansion chamber were measured and compared with the calculated one which was obtained from a self-developed program in our team. The analysis on the interrupting performance of each model interrupter has been done on the base of the short-circuit test results.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2003.09a
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• pp.58-61
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• 2003

This paper proposes e-Learning environments far digital circuit experiment. The e-Learning environments are implemented as a WBT system that includes the circuits monitoring system and the students management system. In the WBT client-server system, the instructor represents the server and students represent clients. The client computers are equipped with a digital circuit training board and connected to the server on the World Wide Web. The training board consists of a Programmable Logic Device (PLD) and measuring instruments. The instructor can reconfigure the PLD with various circuit designs from the server so that students can investigate signals from the training board. The instructor can monitor the progress of the students using Joint Test Action Grouo(JTAG) technology. We implement the WBT system and a courseware fo digital circuits and evaluation the environments.

• Transactions of the Korean Society for Noise and Vibration Engineering
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• v.13 no.4
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• pp.300-307
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• 2003

This paper presents the multi-mode noise reduction of smart panels of which passive piezoelectric shunt damping is introduced. For the piezoelectric shunt damping, a passive shunt circuit composed of inductors and a load resistor is connected to the piezoelectric patch mounted on the panel structure. An electrical impedance model is introduced for the system based on the measured electrical impedance, and the criteria for maximum energy dissipation at the shunt circuit is used to find the optimal shunt parameters. For multi-mode shunt damping, the shunt circuit is modified by the introduction of a block circuit. Also the optimal location of the piezoelectric patch is studied by finite element analysis in order to cause the maximum admittance from the patch for each mode of the structure. An acoustic test is performed for the panels and a remarkable noise reduction is obtained in multiple modes of the panel structure.

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.846-847
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• 2011

This paper presents the study on analysis of single phase induction motor characteristics by equivalent circuit. For high efficiency of single phase induction motor, the motor parameters used for equivalent circuit analysis is important. The accuracy of equivalent circuit analysis of motor depends on the circuit parameters like saturation factor. Therefore this paper proposed the analysis method considering saturation factor. The saturation factor was calculated by iteration routine and numerical method. this proposed method was verified by FEM analysis results and dynamo test results of the prototype model.

• 한국정보통신설비학회:학술대회논문집
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• 2007.08a
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• pp.264-268
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• 2007

This article presents the performance evaluation case study of circuit-switched WCDMA R5MSC(Mobile Switching Center) Server and CS-MGW(Circuit Switched Media Gateway) in 3'rd generation mobile telecommunication (UMTS : Universal Mobile Telecommunication System). The presented work adopted circuit switching scenarios recommended by 3GPP(Third Generation Partnership Project) and terrestrial spectrum calculation parameters and its values defined in ITU-R M.2023 and M.1390 to do the case study on performance evaluation of circuit switched system (R5 MSC Server and CS-MGW) in WCDMA core network. This paper describes test results by using simulator which substitutes for wireless section (MS, Node-B, RNC).

• Journal of Electrical Engineering and Technology
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• v.2 no.4
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• pp.434-440
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• 2007

This paper proposes a fault location algorithm for double-circuit transmission lines in the case of single line-to-ground fault. The proposed algorithm requires the voltage and current from the sending end of the transmission line. The fault distance is simply determined by solving a second order polynomial equation which is achieved directly by the analysis of the circuit. In order to testify the performance of the proposed algorithm, several other conventional approaches have been taken out to compare with it. The test results corroborate its superior effectiveness.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.5
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• pp.1068-1073
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• 2004

5 V/500 mA transless type power module was designed by using a semiconductor switching technique for a small-sized electric power source. It used voltage drop type chopper method, and is composed of switching circuit, control circuit, voltage detect circuit, and constant voltage circuit. The switching power module which is designed in this study, showed load regulation of 0.2 V, line regulation of 0.1 V, output ripple of 85 mVp-p, switching frequency of 64.7 kHz, maximum power efficiency of 58 %, and satisfied its reliability and EMC test.

• Proceedings of the KIEE Conference
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• 2006.07a
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• pp.466-467
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• 2006

Several synthetic testing methods have widely been used for the performance evaluation of ultra high-voltage circuit breaker. Among these synthetic method, in the paper, capacitance switching testing method which can meet the test requirements and increase the testing capacity has been proposed. This method is made up of two separated sources of short-circuit generator for current source and L-C resonance circuit for voltage source. By using this method, KERI will perform the performance evaluation of capacitive current switching performance for the 800kV GCB(Gas Circuit Breaker).

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07b
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• pp.607-610
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• 2003

The characteristic prediction and analysis of 3-dimensional (3-D) solenoid-type embedded inductors is investigated. The four different structures of 3-D inductor are fabricated by using low-temperature cofired ceramic (LTCC) process. The circuit model parameters of the each building block are optimized and extracted using the partial element equivalent circuit method and HSPICE circuit simulator. Based on the model parameters, predictive modeling is applied for the structures composed of the combination of the modeled building blocks. And the characteristics of test structures, such as self-resonant frequency, inductance and Q-factor, are analyzed. This approach can provide the characteristic conception of 3-D solenoid embedded inductors for structural variations.