• Title/Summary/Keyword: symbol timing synchronization

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Frame Synchronization Method for Distributed MIMO Terrestrial Broadcasting Systems (분산 다중 안테나 지상파 방송 시스템을 위한 프레임 동기화 방법)

  • Ok, Kyu-Soon;Kang, In-Woong;Kim, Youngmin;Seo, Jae Hyun;Kim, Heung Mook;Kim, Hyoung-Nam
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.41 no.4
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    • pp.424-432
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    • 2016
  • World's leading countries are developing next generation digital broadcasting system specifications to support UHDTV (ultra-high definition television) contents and other various services. In order to maximize the transmission capacity by using the bandwidth efficiently, most broadcasting systems adopt MIMO-OFDM. In distributed-MIMO systems, multiple transmit antennas are spatially separated and therefore result in multiple timing offsets. To overcome this problem, this paper proposes a technique using a null symbol to detect each individual signal from distributed transmit antennas. By inserting null symbols before preambles, the receiver can distinguish the signals between each transmit antennas and perform frame synchronization. When the reception time difference is shorter than 500 samples, the proposed method outperforms the conventional method.

Performance Analysis of Symbol Timing and Carrier Synchronization in LMDS System (LMDS 시스템에서의 심벌타이밍과 반송파 동기의 성능분석)

  • Lim, Hyung-Rea;Park, Sol;Cho, Byung-Lok
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 1998.11a
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    • pp.383-388
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    • 1998
  • 본 논문에서는 LMDS(Local Multipoint Distributed Services) 시스템의 역방향 채널에서 TDMA(Time Division Multiple Access) 방식으로 ATM(Asynchronous Transfer Mode) 셀을 효율적으로 전송하기 위해 전치부호를 줄일 수 있는 블록복조 알고리즘을 적용한 $\pi$/4 QPSK 변복조 방식 시스템을 제안하고, 블록복조의 동기성능을 향상시키기 위해 새로운 반송파 동기회로를 설계하였다. 제안한 블록동기복조 알고리즘을 적용한 $\pi$/4 QPSK 변복조 방식 시스템은 LMDS 환경에서 ATM 셀 단위의 버스트 데이터로 반송파 위상동기, 심벌 타이밍 동기, 슬롯 타이밍 동기 둥을 수행할 때 전치부호를 아주 적게 사용하므로 효율적인 프레임 전송을 얻어질 수 있도록 하고 있다. 제안한 방식의 성능평가를 위한 모의실험은 LMDS 채널환경과 프레임 구조의 버스트 모드 전송환경에서 심벌 타이밍 동기, 주파수 오프셋, 반송파 위상동기, 페이딩 채널에 따라 수행하였다. 본 논문에서 제안한 블록동기복조 알고리즘을 적용한 $\pi$/40 QPSK 변복조 방식 시스템을 모의수행을 통하여 분석한 결과, 페이딩 환경에서 심벌 타이밍 동기, 주파수 오프셋, 반송파 위상동기할 때 전치부호를 아주 적게까지 줄이더라도 좋은 성능을 발휘함을 확인할 수 있었다.

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Improving the SFD Detection Performance of IEEE802.15.4a IR-UWB System (IEEE 802.15.4a IR-UWB 시스템의 SFD 검출 성능 개선 방안)

  • Lee, Ji-Yeon;Kang, Dong-Hoon;Park, Hyo-Bae;Oh, Wang-Rok
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.4C
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    • pp.358-363
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    • 2010
  • In IEEE 802.15.4a IR-UWB (Impulse Radio Ultra Wideband) systems, it is crucial to acquire initial carrier/timing synchronization and estimate channel response by exploiting the SYNC symbols embedded in each packet. On the other hand, it is also crucial to detect the SFD pattern followed by the header and data symbols to reliably extract the information contained in the packet. In this paper, we propose a reliable SFD detection scheme utilizing some surplus SYNC symbols in addition to SFD symbols to improve the SFD detection performance.

Baseband Receiver Design for Maritime VHF Digital Communications (해양 VHF 디지털 통신을 위한 기저대역 수신기 설계)

  • Kim, Seung-Geun;Yun, Chang-Ho;Kim, Sea-Moon;Lim, Yong-Kon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.8B
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    • pp.1012-1020
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    • 2011
  • In this paper a design of $\pi$/4-DQPSK baseband receiver for the exchange of digital data and e-mail between shore and ship stations and/or among ship stations in the maritime mobile service VHF channels is described. Due to the permitted relatively big frequency instability of local oscillators at the transmitter and the receiver of maritime communication system, the designed baseband receiver should have the capabilities of correct estimation and compensation of the synchronization parameters, such as symbol timing and frequency offset, from the received signal which might include relatively big frequency error. Simulated BER results show that the designed baseband receiver works less than 0.5dB loss under AWGN channel when the normalized frequency offset of the received signal is more then 20%.

Estimation of Fractional Frequency Offset for the Next-Generation Digital Broadcasting System (차세대 디지털 방송시스템을 위한 소수배 주파수 오프셋 추정)

  • Kim, Ho Jae;Kang, In-Woong;Seo, Jae Hyun;Kim, Heung Mook;Kim, Hyoung-Nam
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.41 no.11
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    • pp.1364-1373
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    • 2016
  • Ultra High Definition Television (UHDTV) has attracted much attention as one of next generation broadcasting services. For the commercialization of UHD broadcasting service, standardization groups including the DVB (Digital Video Broadcasting) and the ATSC (Advanced Television Systems Committee) have decided to adopt the Orthogonal Frequency Division Multiplexing (OFDM) for signal transmission. However, when the carrier frequency is not properly synchronized at the receiver, inter-symbol interference (ISI) and inter-carrier interference (ICI) may occur. In order to avoid performance degradation resulting from ISI or ICI, receivers should synchronize the carrier frequency by using preambles and pilot symbols. However, there only few published literature dealing with the frequency offset estimation methods regarding the next generation terrestrial broadcasting. In this respect, this paper proposes a method to estimate timing and fractional frequency offset for the ATSC 3.0 system by using a preamble bootstrap symbol. The proposed detector can detect the fractional frequency offset by adding a complex conjugate product on the conventional estimator where only timing offset can be estimated.

Implementation of a FLEX Protocol Signal Processor for High Speed Paging System (고속 페이징 시스템을 위한 FLEX 프로토콜 신호처리기의 구현)

  • Gang, Min-Seop;Lee, Tae-Eung
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.1
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    • pp.69-78
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    • 2001
  • This paper presents the design and FPGA implementation of a FLEX PSP(Protocol Signal Processor) for the portable high speed paging system. In this approach, two algorithms are newly proposed for implementing the PSP which provides capabilities of the maximum 6,400bps at speed, high-channel throughput, real time error correction and an effective frame search function. One is an accurate symbol synchronization algorithm which is applied for synchronizing the interleaved 4-level bit symbols which are received at input stage of A/D converter, and the other is a modified fast decoding algorithm which is provided for realizing double error correction of (31,21)BCH signal. The PSP is composed of six functional modules, and each module is modelled in VHDL(VHSIC Hardware Description Language). Both functional simulation and logic synthesis have performed for the proposed PSP through the use of Synopsys$^{TM}$ tools on a Axil-320 Workstation, and where Altera 10K libraries are used for logic synthesis. From logic synthesis, we can see that the number of gates is about 2,631. For FPGA implementation, timing simulation is performed by using Altera MAX+ PLUS II, and its results will be also given. The PSP which is implemented in 6 FPGA devices on a PCB has been verified by means of Logic Analyzer.r.

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A Study on the FSK Synchronization and MODEM Techniques for Mobile Communication Part II : Performance Analysis and Design of The FSK MODEM (이동통신을 위한 FSK 동기 및 변복조기술에 관한 연구 II부. FSK 모뎀 설계 및 성능평가)

  • Kim, Gi-Yun;Choe, Hyeong-Jin;Jo, Byeong-Hak
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.37 no.3
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    • pp.9-17
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    • 2000
  • In this paper we implement computer simulation system of 4FSK signal MODEM using Quadrature detector and analyze overall tranceiver system. We follow the FLEX wireless paging system standards and construct premodulation filter and data frame. We propose an efficient open loop symbol timing recovery algorithm which takes advantage of 128 bit length preamble pattern and also propose a 32 bit UW pattern which Is based on the optimal UW detection method, and excellent aperiodic autocorrelation characteristic. The BER simulation in the fading channel as well as AWGN is performed with BCH coding and Interleaving to the Quadrature detector system and it is shown that a high coding fain occurs in the fading channel rather than AWGN channel.

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