• 전기전자학회논문지
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• 제25권3호
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• pp.467-472
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• 2021

고온에서도 반도체 소자의 안정적인 동작이 필요하다. 반도체 소자의 구조중에서 고온에서 불안정한 전기적 응답을 야기할 수 있는 영역은 금속과 반도체가 접합하는 콘택층이다. 본 연구에서는 p형 SiC 층위에 니켈-실리사이드(NiSix)의 콘택층을 형성하는 공정과정에 포함되는 어닐링 공정 조건이 콘택 저항의 비저항과 전체 저항에 미치는 효과를 고찰하였다. 이를 위해, 4인치 p형 SiC층 위에 전송길이 이론(transfer length method: TLM) 측정을 위한 알련의 전극 패턴들을 형성하였고, 어닐링 온도(1700와 1800℃)와 어닐링 시간(30와 60분)을 달리하여 4종의 시료를 제조하였으며, TLM을 이용한 저항을 측정하였다. 그 결과, 어닐링 조건이 콘택층의 저항과 소자의 전기적 안정성에 영향을 미치는 사실을 확인하였다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.292-292
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• 2014

Wide band gap semiconductors, such as III-nitrides (GaN, AlN, InN, and their alloys), SiC, and diamond are expected to play an important role in the next-generation electronic devices. Specifically, GaN-based high electron mobility transistors (HEMTs) have been targeted for high power, high frequency, and high temperature operation electronic devices for mobile communication systems, radars, and power electronics because of their high critical breakdown fields, high saturation velocities, and high thermal conductivities. For the stable operation, high power, high frequency and high breakdown voltage and high current density, the fabrication methods have to be optimized with considerable attention. In this study, low ohmic contact resistance and smooth surface morphology to AlGaN/GaN on 2 inch c-plane sapphire substrate has been obtained with stepwise annealing at three different temperatures. The metallization was performed under deposition of a composite metal layer of Ti/Al/Ni/Au with thickness. After multi-layer metal stacking, rapid thermal annealing (RTA) process was applied with stepwise annealing temperature program profile. As results, we obtained a minimum specific contact resistance of $1.6{\times}10^{-7}{\Omega}cm2$.

• 마이크로전자및패키징학회지
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• 제10권4호
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• pp.29-33
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• 2003

n-형 탄화규소 반도체에 대한 구리금속을 이용하여 오옴성 접촉 구조를 제작하였다. 제작된 구리접촉에 대해 후속열처리 조건과 금속접촉 구조에 따른 재료적, 전기적 성질의 변화를 조사하였다. 금속접촉의 오옴성 성질은 금속박막의 구조 뿐 아니라 열처리조건에 대해서도 크게 좌우됨을 알 수 있었다. 열처리는 급속열처리 장치를 이용한 진공상태 및 환원 분위기에서 2단계 열처리방식을 통하여 시행하였다. 접촉비저항의 측정을 위해 TLM 구조를 만들었으며 면저항 ($R_{s}$), 접합저항 ($R_{c}$), 이동거리 ($L_{T}$), 패드간거리 (d), 전체저항 ($R_{T}$) 값을 구하여 알려진 계산식에 의해 접촉비저항 ($p_{c}$) 값을 추정하였다. 진공보다 환원분위기에서 후속 열처리를 수행한 시편이 양호한 전기적 성질을 가짐을 알 수 있었다. 가장 양호한 결과는 Cu/Si/Cu 구조를 가진 금속접촉 결과이었으며 접촉비저항 ($p_{c}$)은 $1.2\times 10^{-6} \Omega \textrm{cm}^2$의 낮은 값을 얻을 수 있었다. 재료적 성질은 XRD를 이용하여 분석하였고 SiC 계면 상에 구리와 실리콘이 결합한 구리 실리사이드가 형성됨을 알 수 있었다.

• 한국진공학회지
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• 제11권1호
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• pp.35-42
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• 2002

스퍼터로 성장시킨 $n-ZnO:Al(3\times10^{18}\textrm{cm}^{-3})$ 박막에 Ru 금속 박막을 이용하여 열적으로 안정하며 낮은 저항을 가지는 오믹 접촉을 제작하였다. 상온에서 $2.1{\times}10^{-3}{\Omega}\textrm{cm}^2$의 비접촉 저항을 보이던 Ru 오믹 접촉은 열처리 온도를 증가시킴에 따라 I-V특성이 향상되었고 특히 $700^{\circ}C$에서 1분 동안 열처리 할 경우 $3.2{\times}10^{-5}}{\Omega}\textrm{cm}^2$의 낮은 비접촉 저항을 나타내었다. 또한 Ru 오믹 접촉 시스템은 고온에서도 안정한 특성을 나타내었는데 $700^{\circ}C$에서의 고온 열처리 후에도 1.4 nm의 아주 낮은 rms 거칠기를 갖는 평탄한 표면을 나타내었다. 이와 같이 낮은 비접촉 저항과 열적 안정성은 Ru 오믹 접촉 시스템이 ZnO를 근간으로 하는 고성능의 광소자 및 고온소자에 적합한 오믹 접촉 시스템이라는 것을 말해준다. 또한 Ru 오믹 접촉의 비접촉 저항의 열처리 온도 의존성을 설명할 수 있는 메카니즘을 제시하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.25-26
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• 2008

Electrical properties of Pt/Ti/Au/Pt contacts to n-GaAs were characterized as the V/III ratio of GaAs grown by metalorganic chemical vapor deposition were 25, 50, and 100, respectively. The samples have been annealed during 30sec at 350 and $450^{\circ}C$ in rapid thermal annealing, and those specific contact resistance investigated by using transmission line method. According to experimental results, the specific contact resistance between p-metal and GaAs was decreased as the V/III ratio was lower. These results indicate that Si doping concentration of GaAs increased as the vacancy of V-series of GaAs was high.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 하계학술대회 논문집 Vol.4 No.2
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• pp.834-837
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• 2003

In this study, Ohmic contacts make on 3C-SiC using TiN. Ohmic contact resistivity of TiN/3C-SiC was evaluated. Specific contact resistance was calculated by Circular-TLM(transmission line model) method and physics properties were measured using XRD, SEM, respectively. TiN contact is stable at high temperatures and a good diffusion barrier material. The TiN/3C-SiC contacts are thermally stable to annealing temperatures up to $1000^{\circ}C$. The TiN thin-film depostied on 3C-SiC substraes have good electrical properties. Therefore, the TiN/3C-SiC contact can be usefully applied for high-temperature MEMS applications over $500^{\circ}C$.

• 한국전기전자재료학회논문지
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• 제21권11호
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• pp.968-972
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• 2008

Ni/Ti/Al multilayer system ('/'denotes the deposition sequence) was tested for low-resistance ohmic contact formation to Al-implanted p-type 4H-SiC. Ni 30 nm / Ti 50 nm / Al 300 nm layers were sequentially deposited by e-beam evaporation on the 4H-SiC samples which were implanted with Al (norminal doping concentration = $4\times10^{19}cm^{-3}$) and then annealed at $1700^{\circ}C$ for dopant activation. Rapid thermal anneal (RTA) temperature for ohmic contact formation was varied in the range of $840\sim930^{\circ}C$. Specific contact resistances were extracted from the measured current vs. voltage (I-V) data of linear- and circular transfer length method (TLM) patterns. In constrast to Ni contact, Ni/Ti/Al contact shows perfectly linear I-V characteristics, and possesses much lower contact resistance of about $2\sim3\times10^{-4}\Omega{\cdot}cm^2$ even after low-temperature RTA at $840^{\circ}C$, which is about 2 orders of magnitude smaller than that of Ni contact. Therefore, it was shown that RTA temperature for ohmic contact formation can be lowered to at least $840^{\circ}C$ without significant compromise of contact resistance. X-ray diffraction (XRD) analysis indicated the existence of intermetallic compounds of Ni and Al as well as $NiSi_{1-x}$, but characteristic peaks of $Ti_{3}SiC_2$, a probable narrow-gap interfacial alloy responsible for low-resistance Ti/Al ohmic contact formation, were not detected. Therefore, Al in-diffusion into SiC surface region is considered to be the dominant mechanism of improvement in conduction behavior of Ni/Ti/Al contact.

• Tribology and Lubricants
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• 제36권5호
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• pp.290-296
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• 2020

When two layers of carbon nanotube (CNT) arrays are loaded to mate, the free ends of individual CNTs come into contact at the interface of the two layers. This leads to a higher contact resistance due to a smaller contact region. However, when the free CNT ends of one array penetrate into the mating array, the contact region increases, effectively lowering the contact resistance. To explore the penetration of mating CNTs, we perform molecular dynamic simulations of a simple unit cell model, incorporating four CNTs in the lower array layer coupled with a single moving CNT on the upper layer. The interaction with neighboring CNTs is modelled by long-range carbon bond order potential (LCBOP I). The model structure is optimized by energy minimization through the conjugate gradient method. A NVT ensemble is used for maintain a room temperature during simulation. The time integration is performed through the velocity-Verlet algorithm. A significant vibrational motion of CNTs is captured when penetration is not available, resulting in a specific vibration mode with a high frequency. Due to this vibrational behavior, the random behaviors of CNT motion for predicting the penetration are confirmed under the specific gap distances between CNTs. Thus, the probability of penetration is examined according to the gap distance between CNTs in the lower array and the aspect ratio of CNTs. The penetration is significantly affected by the vibration mode due to the van der Waals forces between CNTs.

• 대한금속재료학회지
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• 제48권5호
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• pp.456-461
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• 2010

We investigated the In-based ohmic contacts on Nitrogen-face (N-face) n-type GaN, as well as Ga-face n-type GaN, for InGaN-based vertical Light Emitting Diodes (LEDs). For this purpose, we fabricated Circular Transfer Length Method (CTLM) patterns on the N-face n-GaN that were prepared by using a laser-lift off method, as well as on the Ga-face n-GaN that were prepared by using a dry etching method. Then, In/transparent conducting oxide (TCO) and In/TiW schemes were deposited on the CTLM in order for low resistance ohmic contacts to form. The In/TCO scheme on the Ga-face n-GaN showed high specific contact resistance, while the minimum specific contact resistance was only 3${\times}$10$^{-2}$ $\Omega$-cm$^{2}$ after annealing at 300${^{\circ}C}$, which can be attributed to the high sheet resistance of the TCO layer. In contrast, the In/TiW scheme on the Ga-face n-GaN produced low specific contact resistance of 2.1${\times}$10$^{5}$ $\Omega$-cm$^{2}$ after annealing at 500${^{\circ}C}$ for 1 min. In addition, the In/TiW scheme on the N-face n-GaN also resulted in a low specific contact resistance of 2.2${\times}$10$^{-4}$ $\Omega$-cm$^{2}$ after annealing at 300${^{\circ}C}$. These results suggest that both the Ga-face n-GaN and N-face n-GaN.

• 전자공학회논문지A
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• 제31A권10호
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• pp.87-93
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• 1994

Ohmic contacts between Au and p-HgHg_{0.7}Cd_{0.3}Te$ with low specific contact resistance have been obtained. The contact region of the wafer is first pre-heated for 5 seconds in a rapid thermal processing equipment. The temperature reaches a maximum value of about 200$^{\circ}C$ at the end of the 5 seconds. Next, a thin Au film is formed on the contact region by immersing the sample in AuCl$_{3}$ solution. the sample is then post-annealed in the same condition as the pre-heating after Pb/In pad metals are deposited on the electroless Au contacts. The specific contact resistance measured by transmission line model is 5${\times}10^{-3}{\Omega}cm^{2}$ at 80K. RBS and differential Hall measurement data suggest that the above low resistance ohmic contact is ascribed to surface traps and increased gold diffusion rate.