• 한국군사과학기술학회지
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• 제17권1호
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• pp.57-63
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• 2014

In this paper, we have proposed a wide band antenna for manpack SDR(Software Defined Radio). The proposed antenna consists of feeding post, flexible gooseneck and two radiating elements composed of a upper and lower radiators. The upper radiator has a longer electrical length than the lower radiator in order to operate in the lower frequency. Also, the resonant frequency and impedance characteristics of the antenna can be adjusted independently for two radiators. Therefore, the proposed antenna can be achieved wide impedance bandwidth by the combination of two independent resonance modes. To analyze the characteristics of the antenna in the design process is employed the equivalent circuit theory and EM(Electro-Magnetic) simulation. The measurement results show that the proposed antenna have the sufficient wide bandwidth, above -3.4dBi of the gain and fairly good radiation pattern over the wide bandwidth.

• ETRI Journal
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• 제32권2호
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• pp.214-221
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• 2010

Radio frequency (RF) subsampling can be used by radio receivers to directly down-convert and digitize RF signals. A goal of a cognitive radio/software defined ratio (CR/SDR) receiver design is to place the analog-to-digital converter (ADC) as near the antenna as possible. Based on this, a band-pass sampling (BPS) frontend for CR/SDR is proposed and verified. We present a receiver architecture based second-order BPS and signal processing techniques for a digital RF frontend. This paper is focused on the benefits of the second-order BPS architecture in spectrum sensing over a wide frequency band range and in multiband receiving without modification of the RF hardware. Methods to manipulate the spectra are described, and reconstruction filter designs are provided. On the basis of this concept, second-order BPS frontends for CR/SDR systems are designed and verified using a hardware platform.

• International Journal of Aeronautical and Space Sciences
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• 제9권2호
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• pp.121-128
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• 2008

Modularized GPS software defined radio (SDR) has many advantages of applying and modifying algorithm. Hardware based GPS receiver uses many hardware parts (such as RF front, correlators, CPU and other peripherals) that process tracked signal and navigation data to calculate user position, while SDR uses software modules, which run on general purpose CPU platform or embedded DSP. SDR does not have to change hardware part and is not limited by hardware capability when new processing algorithm is applied. The weakness of SDR is that software correlation takes lots of processing time. However, in these days the evolution of processing power of MPU and DSP leads the competitiveness of SDR against the hardware GPS receiver. This paper shows a study of modulization of GPS software platform and it presents development of the GNSS software platform using MATLAB Simulink™. We focus on post processing SDR platform which is usually adapted in research area. The main functions of SDR are GPS signal acquisition, signal tracking, decoding navigation data and calculating stand alone user position from stored data that was down converted and sampled intermediate frequency (IF) data. Each module of SDR platform is categorized by function for applicability for applying for other frequency and GPS signal easily. The developed software platform is tested using stored data which is down-converted and sampled IF data file. The test results present that the software platform calculates user position properly.

• 한국정보과학회:학술대회논문집
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• 한국정보과학회 2006년도 한국컴퓨터종합학술대회 논문집 Vol.33 No.1 (D)
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• pp.175-177
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• 2006

SDR (Software Defined Radio) 기술은 세계적인 공통 표준이 없는 이동통신 시스템을 하나의 단말을 이용하여 소프트웨어적으로 접근 가능하도록 만들어주는 것이다. SDR에서는 소프트웨어 프레임워크의 표준으로 JTRS JPO에서 정의한 SCA (Software Communications Architecture)를 채택하였다. 본 논문에서는 SCA의 구조에 대해서 간단히 살펴보고 소프트웨어 컴포넌트의 실시간 교체 방법이 필요한 부분임을 프로그램 시뮬레이션을 통해 제시한다.

• TTA 저널
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• 통권72호
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• pp.137-145
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• 2000

본 고에서는 지난 3월 FCC가 발표한 NOI(Notice of Inquiry)에 대한 SDR포럼 의견을 분석$\cdot$정리하였다. 지면관계상 전체 27개의 질문가운데 SDR기술 현황에 관한 5가지의 질문에 대한 SDR포럼 의견을 분석하였다. 아울러 지난 9월 파리에서 열린 제20회 SDR 포럼 회의결과에 대해서도 간단히 언급하였다.

• ETRI Journal
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• 제35권5호
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• pp.767-774
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• 2013

In this paper, a novel parallel Viterbi decoding scheme is proposed to decrease the decoding latency and power consumption for the software-defined radio (SDR) system. It implements a divide-and-conquer approach by first dividing a block into a series of subblocks, then performing independent Viterbi decoding for each subsequence, and finally merging the surviving subpaths into the final path. Moreover, a network-on-chip-based SDR platform is used to evaluate the performance of the proposed parallel Viterbi decoding scheme. The experiment results show that our scheme can speed up the Viterbi decoding process without increasing the BER, and it performs better than the current state-of-the-art methods.

• Journal of Information Processing Systems
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• 제8권1호
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• pp.133-144
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• 2012

In order to make cognitive radio systems a practical technology to be deployed in real-world scenarios, the core Software Defined Radio (SDR) systems must meet the stringent requirements of the target application, especially in terms of performance and energy consumption for mobile platforms. In this paper we present a feasibility study of hardware acceleration as an energy-efficient implementation for SDR. We identified the amplifier function from the Software Communication Architecture (SCA) for hardware acceleration since it is one of the functions called for most frequently and it requires intensive floating-point computation. Then, we used the Virtex5 Field-Programmable Gate Array (FPGA) to perform a comparison between compiler floating-point support and the on-chip floating-point support. By enabling the on-chip floating-point unit (FPU), we obtained as high as a 2X speedup and 50% of the overall energy reduction. We achieved this with an increase of the power consumption by no more than 0.68%. This demonstrates the feasibility of the proposed approach.

• 제어로봇시스템학회논문지
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• 제12권5호
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• pp.438-443
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• 2006

In this paper, We had proposed SDR module, and designed FPGA to compose with channel separation of broadband CDMA signal what have multiple FA. At decomposition and composition process of multiple FA CDMA signal, system only progress decomposition and composition of channel selected by software. Therefore, proposed system can manage base station transceiver system very effectively than the other way what send on all band of multiple CDMA signal. Also, it is possible that system sets again coefficient of each filter because it is consisted of SDR module. Therefore, we can easily control coefficient each filter according to base station transceiver system environment.

• 전자공학회논문지 IE
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• 제48권3호
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• pp.20-25
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• 2011

본 논문은 와이브로 통신환경에서 SDR(Software Defined Radio) 시스템을 위한 실행속도 증진 방법을 개발하였다. 본 논문에서는 SDR 기능 구현을 위해 GPU(Graphics Processing Unit)라는 새로운 프로세서를 사용하였다. 일반적으로 통신시스템에서는 DSP(Digital Signalling Processor)나 FPGA(Field Programmable Gate Array)를 이용하여 시스템을 구현한다. 그러나 이러한 프로세서는 장단점이 커서 구현 및 디버깅을 하기 어렵다. GPU는 다수의 프로세서로 구성되어 있어 벡터 처리에 적합하며, 각 프로세서는 thread의 셋으로 구성이 되어 있다. 본 논문에서는 GPU만의 자원뿐만 아니라 CPU 자원 까지 사용하기 위한 Framework 또한 구현하였다. 다양한 실험결과, 본 제안 시스템이 와이브로 환경에서 우수한 성능을 제공함을 확인할 수 있었다.

• 한국정보처리학회:학술대회논문집
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• 한국정보처리학회 2003년도 추계학술발표논문집 (중)
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• pp.891-894
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• 2003

본 논문에서는 다양한 이동 통신 서비스에 대한 호환성을 지원하는 기술인 소프트웨어에 의한 단말기 형상의 재구성을 가능하게 하는 Software Defined Radio(SDR)에 대한 내용을 기술한다. SDR의 핵심기술 중 하나인 소프트웨어 다운로드에 대해 소개하고 이와 관련된 재구성에 대해 서술해 보기로 한다.