• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.1
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• pp.54-61
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• 2003

This paper shows the results of emissive electromagnetic field characteristics on medium voltage power line(22.9 kV). The measurements were taken when communications signals were coupled into the 22.9 kV main wire of medium voltage power-line in a frequency range of 9 kHz to 30 MHz. The results of the measurement are as follows-emissive electromagnetic Held characteristics from multi carrier signals were superior to a single carrier signal. And we confirmed the PLC transmission distance was 1.8 km when multi-carrier transmission power was 20 dBm. Electric field strength was under the 40 dBuV/m at 30 MHz when 10 m method was measured.

• The Transactions of the Korea Information Processing Society
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• v.6 no.1
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• pp.193-202
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• 1999

A promising telecommunication system so called IMT-2000 is forecasted to cover almost 50 percent of telecommunication services, which will be provided in the beginning of the year 2000. The system offers high quality service such as data, image, and video as well as voice. UPT, which offers the personal mobility, is recognized as an important service because we can bind a variety of wire or wireless networks as single number. This paper discusses the design of IMT-2000 MSC based on AIN and UPT service in the MSC. First, we propose the system structure of the IMP-2000 MSC, as a platform of UPT service implementation. Based on this, we define main functions and its blocks of the IMP-2000 MSC. Third, we present the structure of SSF and Its operational mechanism to support the IN services such as UPT. Finally, we present the detail UPT service implementation for the IMP-2000 MSC through the design of UPT call flows between software blocks, which are the minimum units, within the IMPt-2000 MSC.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.431-432
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• 2012

In the era of 20 nm scaled semiconductor volume manufacturing, Microelectronics Manufacturing Engineering Education is presented in this paper. The purpose of microelectronic engineering education is to educate engineers to work in the semiconductor industry; it is therefore should be considered even before than technology development. Three Microelectronics Manufacturing Engineering related courses are introduced, and how undergraduate students acquired hands-on experience on Microelectronics fabrication and manufacturing. Conventionally employed wire bonding was recognized as not only an additional parasitic source in high-frequency mobile applications due to the increased inductance caused from the wiring loop, but also a huddle for minimizing IC packaging footprint. To alleviate the concerns, chip bumping technologies such as flip chip bumping and pillar bumping have been suggested as promising chip assembly methods to provide high-density interconnects and lower signal propagation delay [1,2]. Aluminum as metal interconnecting material over the decades in integrated circuits (ICs) manufacturing has been rapidly replaced with copper in majority IC products. A single copper metal layer with various test patterns of lines and vias and $400{\mu}m$ by $400{\mu}m$ interconnected pads are formed. Mask M1 allows metal interconnection patterns on 4" wafers with AZ1512 positive tone photoresist, and Cu/TiN/Ti layers are wet etched in two steps. We employed WPR, a thick patternable negative photoresist, manufactured by JSR Corp., which is specifically developed as dielectric material for multi- chip packaging (MCP) and package-on-package (PoP). Spin-coating at 1,000 rpm, i-line UV exposure, and 1 hour curing at $110^{\circ}C$ allows about $25{\mu}m$ thick passivation layer before performing wafer level soldering. Conventional Si3N4 passivation between Cu and WPR layer using plasma CVD can be an optional. To practice the board level flip chip assembly, individual students draw their own fan-outs of 40 rectangle pads using Eagle CAD, a free PCB artwork EDA. Individuals then transfer the test circuitry on a blank CCFL board followed by Cu etching and solder mask processes. Negative dry film resist (DFR), Accimage$^{(R)}$, manufactured by Kolon Industries, Inc., was used for solder resist for ball grid array (BGA). We demonstrated how Microelectronics Manufacturing Engineering education has been performed by presenting brief intermediate by-product from undergraduate and graduate students. Microelectronics Manufacturing Engineering, once again, is to educating engineers to actively work in the area of semiconductor manufacturing. Through one semester senior level hands-on laboratory course, participating students will have clearer understanding on microelectronics manufacturing and realized the importance of manufacturing yield in practice.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.8B
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• pp.691-700
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• 2006

Based on the destination IP address of incoming packets, the Internet routers determine next hops and forward packets toward final destinations through If address lookup. The bandwidth of communication links increases exponentially fast as well as the routing table size grows significant as the number of single host networks attached to the Internet increases. Since packets should be processed at wire-speed, the increased link speed reduces the processing time of a packet in routers, and hence more efficient and fast IP address lookup algorithms and architectures are required in the next generation routers. Most of the previous IP lookup schemes compare routing prefixes of shorter length first with a given input IP address. Since IP address lookup needs to find the most specific route of the given input, search continues until the longest matched prefix is found while it keeps remembering the current test matching prefix. In this paper, based on binary search on prefix length, we proposed a new IP address lookup algorithm which compares longer prefixes first. The proposed scheme is consisted of multiple tries with prefixes on leaves only. The trie composed of the longest prefixes is primarily searched whether there is a match with the given input. This processing is repeated for the trio of the next longer prefixes until there finds a match. Hence the proposed algorithm provides the fast search speed. The proposed algorithm also provides the incremental update of prefixes while the previous binary search on length scheme does not provide the incremental update because of pre-processing requirement. In this paper, we performed extensive simulations and showed the performance comparisons with related works.