• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11a
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• pp.234-237
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• 2001

FeSi$_2$/Si Layer were grown using FeSi$_2$, Si wafer by the chemical transport reaction method. The directoptical energy gap was found to be 0.871ev at 300 K. The Hall effect is a physical effect arising in matter carrying electric current in the presence of a magnetic field. The effect is named after the American physicist E. H. Hall, who discovered it in 1879. In this paper, we study electrical properties of FeSi$_2$/Si layer And then we measured Hall coefficient Hall mobility, carrier density and Hall voltage according to variation magnetic field and temperature, Because of important Part for it application Various phase of silicide is formed at the metal-Si interface when transition metal contacts to Si. Silicides belong to metallic or semiconducting according to their electrical and optical properties. Metallic silicides are used as gate electrodes or interconnections in VLSI devices. Semiconducting silicides can be used as a new material for IR detectors because of their narrow energy band gap.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11a
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• pp.230-233
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• 2001

FeSi$_2$ Layer were grown using FeSi$_2$, Si wafer by the chemical transport reaction method. The directoptical energy gap was found to be 0.87leV at 300 K. The Hall effect is a Physical effect arising in matter carrying electric current in the presence of a magnetic field. The effect is named after the American physicist E.H. Hall, who discovered it in 1879. In this paper, we study electrical properties of FeSi$_2$/Si layer. And then we measured Hall coefficient Hall mobility, carrier density and Hall voltage according to variation magnetic field and temperature, Because of important part for it application various phase of silicide is formed at the metal-Si interface when transition metal contacts to Si. Silicides belong to metallic or semiconducting according to their electrical and optical properties. Metallic silicides are used as gate electrodes or interconnections in VLSI devices. Semiconducting silicides can be used as a new material for IR detectors because of their narrow energy band gap.

• Applied Microscopy
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• v.48 no.2
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• pp.49-53
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• 2018

A successful transmission electron microscope (TEM) analysis is closely related to the preparation of the TEM specimen and should be followed by the suitable TEM specimen preparation depending on the purpose of analysis and the subject materials. In the case of the Si-based anode material, lithium atoms of formed Li silicide were removed due to ion beam and electron beam during TEM specimen preparation and TEM observation. To overcome the problem, we proposed a new technique to make a TEM specimen without the ion beam damage. In this study, two types of test specimens from the Si-based anode material of Li-ion battery were prepared by respectively adopting the only focused ion beam (FIB) method and the new FIB-ultramicrotome method. TEM analyses of two samples were conducted to compare the Ga ion damage of the test specimen.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.220-221
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• 2007

금속 촉매 성장 (Metal-induced growth) 를 이용하여, 마이크로 사이즈의 결정질 (Microcrystalline) 박막 실리콘 (Silicon, Si)을 성장하였다. 금속 촉매로서는 코발트, 니켈, 코발트/니켈 복합물질(Co, Ni, or Co/Ni) 이 사용되었으며, 실리콘과 반응하여 실리사이드 (Silicide) 층을 형성한다. 이러한 실리사이드 층은 실리콘과 격자 거리가 유사하여 (Little lattice mismatch), 그 위에 실리콘 박막을 성장하기 위한 모체 (Template) 가 된다. XRD (X-ray diffraction) 분석을 통하여, 실리사이드 ($CoSi_2$ or $NiSi_2$) 의 형성과 성장된 박막 실리콘의 결정성을 연구하였다. 이러한 박막을 이용하여, 쇼트키 태양전지 (Schottky Solar cell) 에 응용하였다. 코발트/니켈 복합물질을 이용하였을 경우에 10.6mA/$cm^2$ 단락전류를 얻었으며, 이는 코발트만을 이용한 경우보다 10 배만큼 증가하였다. 이러한 실리사이드를 매개로한 박막 실리콘의 성장은 공정상에서의 열부담 (Thermal budget) 을 줄일 수 있으며, 대면적 응용에 큰 가능성을 가지고 있다.

• 연구논문집
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• s.31
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• pp.113-125
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• 2001

Silicon addition in titanium alloys generally results in solid solution hardening by silicon itself and precipitation hardening by titanium silicides. The morphology and distribution of the titanium silicides depend upon the alloy chemistry or the heat treatment condition, and play an important role in improving the mechanical properties of the alloys. In this study, the morphology and crystallographic characteristics of the titanium silicides in the Ti-Fe-Si alloy system were studied. Three types of silicides were found in the alloys; (1) interconnected chain-like silicides at grain boundary, (2) coarse silicides over im, (3) fine silicides smaller than 0.2m. Ti3Si was dominant in cast + HIP condition while Ti5Si3 was dominant in as-cast state. It is recognized that $Ti_5Si_3$$\rightarrow$$Ti_3Si$ transition occurred by the peritectoid reaction and it may be promoted by the pressure during HIP. However, in the case of the fine silicides, $Ti_3Si$ and $Ti_5Si_3$ were found simultaneously even after HIP. Such a fine silicide was found to have a crystallographic orientation relationship with matrix.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.421-424
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• 2004

As the deep sub-micron devices are recently integrated high package density, novel process method for sub $0.1{\mu}m$ devices is required to get the superior thin gate oxide characteristics and reliability. However, few have reported on the electrical quality and reliability on the thin gate oxide. In this paper I will recommand a novel shallow trench isolation structure for thin gate oxide $30{\AA}$ of deep sub-micron devices. Different from using normal LOCOS technology, novel shallow trench isolation have a unique 'inverse narrow channel effects' when the channel width of the devices is scaled down shallow trench isolation has less encroachment into the active device area. Based on the research, I could confirm the successful fabrication of shallow trench isolation(STI) structure by the SEM, in addition to thermally stable silicide process was achiever. I also obtained the decrease threshold voltage value of the channel edge and the contact resistance of $13.2[\Omega/cont.]$ at $0.3{\times}0.3{\mu}m^2$. The reliability was measured from dielectric breakdown time, shallow trench isolation structure had tile stable value of $25[%]{\sim}90[%]$ more than 55[sec].

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.31-32
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• 2005

Ge 농도가 30%인 SiGe 위에 Ni-Pd 합금을 이용한 새로운 Ni-Germanosilicide의 방법을 제안하여 열안정성 향상에 대해 연구하였다. 새롭게 제안한 Ni-Pd 합금을 이용하여 3 가지 구조 (Ni-Pd, Ni-Pd/TiN, Ni-Pd/Co/TiN) 중 Cobalt 다층구조를 사용한 구조 (Ni-Pd/Co/TiN)가 면저항이 가장 낮고 안정한 silicide 특성을 갖는 것을 나타냈으며, 고온열처리 $700^{\circ}C$, 30분에서도 낮고 안정한 면저항 특성을 유지시켜 열안정성을 개선하였다.

• Korean Journal of Materials Research
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• v.30 no.5
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• pp.262-266
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• 2020

In this paper, we investigated the effect of the passivation stack with Al₂O₃, hydrogenated silicon nitride (SiN_x:H) stack and Al₂O₃, silicon oxynitride (SiON_x) stack in the n type bifacial solar cell on monocrystalline silicon. SiNx:H and SiON_x films were deposited by plasma enhanced chemical vapor deposition on the Al₂O₃ thin film deposited by thermal atomic layer deposition. We focus on passivation properties of the two stack structure after laser ablation process in order to improve bifaciality of the cell. Our results showed SiN_x:H with Al₂O₃ stack is 10 mV higher in implied open circuit voltage and 60 ㎲ higher in minority carrier lifetime than SiON_x with Al₂O₃ stack at Ni silicide formation temperature for 1.8% open area ratio. This can be explained by hydrogen passivation at the Al₂O₃/Si interface and Al₂O₃ layer of laser damaged area during annealing.

• Proceedings of the Korean Vacuum Society Conference
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• 2000.02a
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• pp.150-150
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• 2000

The adsorption geometry and the electronic property of Mg grown at room temperature on the Si(111)-7$\times$7 surface with various coverages have been studied by scanning tunneling microscopy (STM) and low energy electron diffraction (LEED). At low Mg coverage, the Mg atoms preferentially adsorb at the center adatom sites of the faulted half of the Si(111)-7$\times$7 surface. The adsorbed Mg atom acts as nucleophile with respect to Si atoms thus forms a stable ionic bond with the substrate Si atoms. Above 1 Ml, the 7$\times$7 surface starts to be disrupted and an amorphous Mg overlayer is formed. The LEED shows either $\delta$7$\times$7 or 1$\times$1 pattern at this coverage. When more Mg atoms were exposed, a flat and broad {{{{ { 2} over {3 } }}}}{{{{ SQRT { 3} }}}}$\times${{{{ { 2} over {3 } }}}}{{{{ SQRT { 3} }}}}R30$^{\circ}$region evolves. A flat silicide is formed at first and multi-level Mg islands having hexagonal step edges develop with increasing coverage. The scanning tunneling spectroscopy (STS) confirms the electronic properties of these Mg films on the si(111) 7$\times$7 surface at various coverages.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.248-248
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• 2010

CMOS 축소화가 32nm node를 넘어서 지속적으로 진행되기 위하여 FinFET, Surround Gate and Tri-Gate와 같은 Fully Depleted 3-Dimensional 소자들이 SCE를 다루기 위해서 많이 제안되어 왔다. 하지만 소자의 축소화를 진행함에 있어서 좁고 균일한 patterning을 형성하는 것과 동시에 낮은 Extension Region과 Contact Region에서의 Series Resistance을 제공하여야 하고 Source/Drain Contact Formation을 확보하여야 한다. 그리고 소자의 축소화가 진행됨으로써 Silicide의 응집현상과 Source/Drain Junction의 누설전류에 대한 허용범위가 점점 엄격해지고 있다. ITRS 2005에 따르면 32nm CMOS에서는 Contact Resistivity가 대략 $2{\times}10-8{\Omega}cm2$이 요구되고 있다. 또한 Three Dimensional 소자에서는 Fin Corner Effect가 Channel Region뿐만 아니라 S/D Region에서도 중대한 영향을 미치게 된다. 따라서 본 논문에서 제시하는 Novel S/D Contact Formation 기술을 이용하여 Self-Aligned Dual/Single Metal Contact을 이루어Patterning에 대한 문제점 해결과 축소화에 따라 증가하는 Contact Resistivity 문제점을 해결책을 제시하고자 한다. 이를 검증하기3D MOSFET제작하고 본 기술을 적용하고 검증한다. 또한 Normal Doping 구조를 가진3D MOSFET뿐만 아니라 SCE를 해결하기 위해서 대안으로 제시되고 있는 SB-MOSFET을 3D 구조로 제작하고, 이 기술을 적용하여 검증한다. 그리고 Silvaco simulation tool을 이용하여 S/D에 Metal이 Contact을 이루는 구조가 Double type과 Triple type에 따라 Contact Resistivity에 미치는 영향을 미리 확인하였고 이를 실험으로 검증하여 소자의 축소화에 따라 대두되는 문제점들의 해결책을 제시하고자 한다.