• Title/Summary/Keyword: silicide

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Epitaxial Growth of Nickel Silicide $(NiSi_2)$ in Vacuum Deposited Nickel and Gold Films on (III) Silicon Single Crystals (규소(III) 단 결정에 진공 증착한 닉켈과 금 박막에서 $NiSi_2$의 적층성장)

  • 윤기현;이희수
    • Journal of the Korean Ceramic Society
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    • v.13 no.3
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    • pp.55-62
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    • 1976
  • 순수한 닉켈과 금 박막을 (III)규소 단 결정위에 진공 증착시켰다. Ni/Au/Si나 Au/Ni/Si시료를 진공중에서 약 55$0^{\circ}C$로 가열하였을 때 육방정 혹은 변형된 육방정의 미소 결정들이 규소 기질위에 형성되었다. 이들 미소 결정들의 형성과정 및 조성은 X-선 회절법, scanning electron microscopy 및 scanning Auger microprobe 법을 사용하여 결정하였다. 이들 미소 결정은 NiSi2임이 확인되었다. Ni/Au/Si 시료에서는 Au-Si 공융점(37$0^{\circ}C$) 이상으로 온도가 증가됨에 따라 닉켈과 규소가 Au-Si 공융체 속으로 이동한 후 반응하여 NiSi2를 형성하였다. Au/Ni/Si 시료에 있어서의 Au-Si 공융체 형성은 닉켈 박막에 있는 바늘구멍형의 표면 결함과 관련 지을 수 있겠다. 금이 닉켈 박막의 grain boundary를 통하여 Ni/Si 계면으로 확산되어 그 계면을 습윤시킨 다음 Au-Si 공융체를 형성하였다. 이런 Au-Si 공용체는 닉켈과 규소 원자에 대한 높은 확산 매질로서 작용하여 NiSi2 형성을 촉진시켰다. 표면에 평행한 (III)규소면 위의 NiSi2 미소 결정은 유사한 육방정으로 나타났으며, 경사진 미소결정은 부등변 사변형과 유사하였다. Auger 스펙트럼 및 Ni, Au 및 Si에 대한 내층조성(indepth Composition Profiles)은 NiSi2 미소 결정이 Au-Si 공융체의 matrix에 미소 부분으로 나타났음을 보여주었다.

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Characteristics of $TiN/TiSi_2$ bilayer by $BF_2$ dopant at Si substrate (기판 실리콘의 $BF_2$ 불순물 원자에 의한 $TiN/TiSi_2$ bilayer의 특성)

  • Lee, C.J.;Park, J.S.;You, H.S.;Sung, Y.K.
    • Proceedings of the KIEE Conference
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    • 1992.07b
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    • pp.835-838
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    • 1992
  • The $TiN/TiSi_2$ bilayer has been studied for contact barrier layer at ULSI recently. The $TiN/TiSi_2$ bilayer was formed by RTA in $NH_3$ ambient simultaneously after the Ti film was deposited on silicon substrate. In this paper, properties of $TiN/TiSi_2$ bilayer was evaluated according to $BF_2$ dopant concentration and dopant redistribution in $TiN/TiSi_2$ bilayer was also analyzed. In this experiment, the composition and structure of $TiN/TiSi_2$ bilayer were constant even though dopant concentration increased but silicide growth rate decreased. Boron atoms were redistributed within TiN film and at $TiSi_2Si$ interface during the bilayer formation.

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Low-cost Contact formation of High-Efficiency Crystalline Silicon Solar Cells by Plating

  • Kim D. S.;Lee E. J.;Kim J.;Lee S. H.
    • New & Renewable Energy
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    • v.1 no.1 s.1
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    • pp.37-43
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    • 2005
  • High-efficiency silicon solar cells have potential applications on mobile electronics and electrical vehicles. The fabrication processes of the high efficiency cells necessitate com placated fabrication precesses and expensive materials. Ti/Pd/Ag metal contact has been used only for limited area In spite of good stability and low contact resistance because of Its expensive material cost and precesses. Screen printed contact formed by Ag paste causes a low fill factor and a high shading loss of commercial solar cells because of high contact resistance and a low aspect ratio. Low cost Ni/Cu metal contact has been formed by using a low cost electroless and electroplating. Nickel silicide formation at the interface enhances stability and reduces the contact resistance resulting In an energy conversion efficiency of $20.2\%\;on\;0.50{\Omega}cm$ FZ wafer. Tapered contact structure has been applied to large area solar cells with $6.7\times6.7cm^2$ in order to reduce power losses by the front contact The tapered front metal contact Is easily formed by the electroplating technique producing $45cm^2$ solar cells with an efficiency of $21.4\%$ on $21.4\%\;on\;2{\Omega}cm$ FZ wafer.

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Interaction of Co/Ti Bilayer with $SiO_2$ Substrate ($SiO_2$와 Co/Ti 이중층 구조의 상호반응)

  • 권영재;이종무;배대록;강호규
    • Journal of the Korean Vacuum Society
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    • v.7 no.3
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    • pp.208-213
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    • 1998
  • Silicidation of the Co/Ti/Si bilayer system in which Ti is used as epitaxy promoter for $CoSi_2$has recently received much attention. The Co/Ti bilayer on the spacer oxide of gate electrode must be thermally stable at high temperatures for a salicide transistor to be fabricated successfully. In the $SiO_2$substrate was rapid-thermal annealed. The Sheet resistances of the Co/Ti bilayer increased substantially after annealing at $600^{\circ}C$, which is due to the agglomeration of the Co layer to reduce the interface energy between the Co layer and the $SiO_2$substrate. In the bilayer system insulating Ti oxide stoichiometric Ti oxide and silicide were not found after annealing.

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Synthesis of Titanium Silicides by Mechanical Alloying (기계적합금화에 의한 Ti Silicide 화합물의 합성)

  • 변창섭;이상호;김동관;이진형
    • Journal of Powder Materials
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    • v.5 no.4
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    • pp.250-257
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    • 1998
  • The synthesis of titanium silicides ($Ti_3Si$, $TiSi_2$, $Ti_5Si_4$, $Ti_5Si_3$ and TiSi) by mechanical alloying has been investigated. Rapid, self-propagating high-temperature synthesis (SHS) reactions were observed to produce the last three phases during room-temperature high-energy ball milling of elemental powders. Such reactions appeared to be ignited by mechanical impact in an intimate, fine powder mixture formed after a critical milling period. During the high-energy ball milling, the repeated impact at contact points leads to a local concentration of energy which may ignite a self-propagating reaction. From in-situ thermal analysis, each critical milling period for the formation of $Ti_5Si_4$, $Ti_5Si_3$ and TiSi was observed to be 22, 35.5 and 53.5 min, respectively. $Ti_3Si$ and $TiSi_2$, however, have not been produced even till the milling period of 360 min due to lack of the homogeneity of the powder mixtures. The formation of titanium silicides by mechanical alloying and the relevant reaction rates appeared to depend upon the critical milling period, the homogeneity of the powder mixtures, and the heat of formation of the products involved.

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The Modeling of ISL(Intergrated Schottky Logic) Characteristics by Computer Simulations (컴퓨터 시뮬레이션에 의한 ISL 특성의 모델링)

  • 김태석
    • Journal of Korea Multimedia Society
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    • v.3 no.5
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    • pp.535-541
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    • 2000
  • In this paper, we analyzed the characteristics of schottky junction to develop the voltage swing of ISL, and simulated the characteristics with the programs at this junctions. Simulation programs for analytic characteristics are the SUPREM V, SPICE, Medichi, Matlab. The schottky junction is rectifier contact between platinum silicide and silicon, the characteristics with programs has simulated the same conditions. The analytic parameters were the turn-on voltage, saturation current, ideality factor in forward bias, and has shown the results of breakdown voltage between actual characteristics and simulation characteristics in reverse bias. As a result, th forward turn-on voltage, reverse breakdown voltage, barrier height were decreased but saturation current and ideality factor were increased by substrates increased concentration variations.

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Formation of Tungsten Silicide Gate Electrode on Quartz (석영 기판 위에서 텅스텐 실리사이드 게이트 전극 형성에 관한 연구)

  • O, Sang-Hyeon;Kim, Ji-Yong;Kim, Ji-Yeong;Lee, Jae-Gap;Im, In-Gon;Kim, Geun-Ho
    • Korean Journal of Materials Research
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    • v.8 no.1
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    • pp.80-84
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    • 1998
  • 본 연구에서는 석영을 기판으로 사용하여 텅스텐 실리사이드 게이트를 고온에서 결정화시키고, 이\ulcorner 발생되는 crack 에 대한 생성원인을 조사하였다. 증착된 텅스텐실리사이드의 실리콘 조성과 실리콘 완층충의 두께가 증가함에 따라 열응력이 감소하는 경향이 관찰되었으며, 과잉의 실리콘 조성을 가진 실리사이드를 열처리한 경우에는 crack에 대한 저항이 증가함을 알 수 있었다. 그러나 실리콘 완충층을 사용한 경우는 두께가 증가함에 따라 열응력이 감소하는 경향이 있으나, crack이 보다 쉽게 발생되는 결과를 얻었다. 이는 실리사이드 반응에 의하여 거칠어진 계면에 응력이 집중되어 crack생성을 쉽게하는 것으로 여겨진다. 결과적으로 석영과 텅스텐실리사이드의 열\ulcorner창계수차이에 의하여 생성되는 열응력이 crack생성의 주원인으로 작용하고, 실리콘 완층층을 사용한 구조하에서는 계면에서 일어나는 실리사이드반응이 crack생성에 큰 영향을 미치는 것으로 생각된다.

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Effect of Rapid Thermal Annealing on the Resistivity Changes of Reactively Sputtered Tungsten Nitride Thin Film (Sputtering법으로 제조된 Tungsten Nitride 박막의 저항변화에 미치는 급속 열처리 영향)

    • Korean Journal of Materials Research
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    • v.10 no.1
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    • pp.29-33
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    • 2000
  • The amorphous tungsten nitrides, WNx, film could be fabricated by reactive sputtering process. The nitrogen concentration for the amorphization ranges from 10 at% to 40at%. The amorphous $W_{67}N_{33}$ film was crystallized into low resistivity $\alpha$-tungsten phase with equiaxed grains and excess nitrogen after the rapid thermal annealing for 1min at 1273K, which was similar to the resistivity of the sputtered pure tungsten film. The excess nitrogen was depleted from $\alpha$-tungsten crystals and then segregated at $\alpha$-tungsten/poly-Si interface. The segregated nitrogen has favored the formation of the homogeneous diffusion barrier layer comprised of silicon nitride, $Si_3N_4$, nano-crystals, which undertaken the inhibition of the high resistivity tungsten silicide reaction.

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Thermal Stability Enhancement of Nickel Monosilicides by Addition of Iridium (이리듐 첨가에 의한 니켈모노실리사이드의 고온 안정화)

  • Yoon, Ki-Jeong;Song, Oh-Sung
    • Korean Journal of Materials Research
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    • v.16 no.9
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    • pp.571-577
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    • 2006
  • We fabricated thermal evaporated 10 nm-Ni/(poly)Si and 10 nm-Ni/1 nm-Ir/(poly)Si films to investigate the thermal stability of nickel monosilicide at the elevated temperatures by rapid annealing them at the temperatures of $300{\sim}1200^{\circ}C$ for 40 seconds. Silicides for salicide process was formed on top of both the single crystal silicon actives and the polycrystalline silicon gates. A four-point tester is used for sheet resistance. Scanning electron microscope and field ion beam were employed for thickness and microstructure evolution characterization. An x-ray diffractometer and an auger depth profile scope were used for phase and composition analysis, respectively. Nickel silicides with iridium on single crystal silicon actives and polycrystalline silicon gates showed low resistance up to $1200^{\circ}C$ and $800^{\circ}C$, respectively, while the conventional nickel monosilicide showed low resistance below $700^{\circ}C$. The grain boundary diffusion and agglomeration of silicides led to lower the NiSi stable temperature with polycrystalline silicon substrates. Our result implies that our newly proposed Ir added NiSi process may widen the thermal process window for nano CMOS process.

Schottky barrier polycrystalline silicon thin film transistor by using platinum-silicided source and drain (플레티늄-실리사이드를 이용한 쇼트키 장벽 다결정 박막 트랜지스터트랜지스터)

  • Shin, Jin-Wook;Choi, Chel-Jong;Chung, Hong-Bay;Jung, Jong-Wan;Cho, Won-Ju
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.80-81
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    • 2008
  • Schottky barrier thin film transistors (SB-TFT) on polycrystalline silicon(poly-Si) are fabricated by platinum silicided source/drain for p-type SB-TFT. High quality poly-Si film were obtained by crystallizing the amorphous Si film with excimer laser annealing (ELA) or solid phase crystallization (SPC) method. The fabricated poly-Si SB-TFTs showed low leakage current level and a large on/off current ratio larger than $10^5$. Significant improvement of electrical characteristics were obtained by the additional forming gas annealing in 2% $H_2/N_2$ ambient, which is attributed to the termination of dangling bond at the poly-Si grain boundaries as well as the reduction of interface trap states at gate oxide/poly-Si channel.

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