• Title/Summary/Keyword: satellite operation

Search Result 899, Processing Time 0.031 seconds

Development and Verification of Thermal Control Subsystem for High Resolution Electro-Optical Camera System, EOS-D Ver.1.0 (고해상도 전자광학카메라 EOS-D Ver.1.0의 열제어계 개발 및 검증)

  • Chang, Jin-Soo;Kim, Jong-Un;Kang, Myung-Seok;Yang, Seung-Uk;Kim, Ee-Eul
    • Journal of the Korean Society for Aeronautical & Space Sciences
    • /
    • v.41 no.11
    • /
    • pp.921-930
    • /
    • 2013
  • Satrec Initiative successfully developed and verified a high-resolution electro-optical camera system, EOS-D Ver.1.0. We designed this system to give improved spatial and radiometric resolution compared with EOS-C series systems. The thermal control subsystem (TCS) of the EOS-D Ver.1.0 uses heaters to meet the opto-mechanical requirements during in-orbit operation and uses different thermal coatings and multi-layer insulation (MLI) blankets to minimize the heater power consumption. Also, we designed and verified a refocusing mechanism to compensate the misalignment caused by moisture desorption from the metering structure. We verified the design margin and workmanship by conducting the qualification level thermal vacuum test. We also performed the verification of thermal math model (TMM) by comparing with thermal balance test results. As a result, we concluded that it faithfully represents the thermal characteristics of the EOS-D Ver.1.0.

Black Body Design and Verification for Non-Uniformity Correction of Imaging Sensor and Uncertainty Analysis (영상센서의 비균일 응답특성 보정을 위한 흑체 설계 및 성능검증과 보정오차 분석)

  • Shin, Somin
    • Journal of the Korean Society for Aeronautical & Space Sciences
    • /
    • v.41 no.3
    • /
    • pp.240-245
    • /
    • 2013
  • Each pixel of InfraRed(IR) sensor differently responds to IR light as time elapses or the sensor on/off operation is repeated. As a result, the quality of IR sensor image is deteriorated, and therefore NUC(Non-uniformity Correction) is periodically needed for IR sensor. In this paper, in order to perform NUC in the Satellite, on-board V-grooved blackbody is designed with a baffle so that the emissivity of black body is to be higher than 0.995 as well as the temperature deviation is less than $1^{\circ}C$ in the range of the infrared wave length from 3.3 to $5.2{\mu}m$. To check its performance, the emissivity and the surface temperature of the blackbody by TRT(Transfer Reference Thermometer) and IR Micrometer scanner are measured, respectively. From the results, black body design is verified and the uncertainty of NUC is estimated through the measurement results.

Characteristics of the Monthly Mean Sea Surface Winds and Wind Waves near the Korean Marginal Seas in the 2002 Year Computed Using MM5/KMA and WAVEWATHC-III model (중규모 기상모델(MM5/KMA)과 3세대 파랑모델(WAVEWATCH-III)로 계산된 한반도 주변해역의 2002년 월평균 해상풍과 파랑 분포 특성)

  • 서장원;장유순
    • The Sea:JOURNAL OF THE KOREAN SOCIETY OF OCEANOGRAPHY
    • /
    • v.8 no.3
    • /
    • pp.262-273
    • /
    • 2003
  • We have analyzed the characteristics of the monthly mean sea surface winds and wind waves near the Korean marginal seas in the 2002 year on the basis of prediction results of the sea surface winds from MM5/KMA model, which is being used for the operation system at the Korea Meteorological Administration and the third generation wave model, WAVEWATCH-III. which takes the sea surface winds derived from MM5/KMA model as the initial data. Statistical comparisons have been applied with both the marine meteorological observation buoy and the TOPEX/POSEIDON satellite wave heights data to verify the model results. The correlation coefficients between the models and observation data reach up to about 60-80%, supporting that these models satisfactorily simulate the sea surface winds and wave heights even at the coastal regions except for Chilbal-Do located very close to the land. Based on these verification results, the distributions of monthly mean sea surface winds, significant wave heights, wave lengths and wave periods around the Korean marginal seas during 2002 year have been represented.

The Removal of Trembling Artifacts for FORMOSAT-2

  • Chang Li-Hsueh;Wu Shun-Chi;Cheng Hsin-Huei;Chen Nai-Yu
    • Proceedings of the KSRS Conference
    • /
    • 2005.10a
    • /
    • pp.142-145
    • /
    • 2005
  • Since the successful launch of FORMOSAT -2 satellite by National Space Organization of Taiwan in May 2004, the Remote Sensing Instrument (RSI) on- board the FORMOSAT -2 has continuously acquired images at one panchromatic and four multi-spectral bands (http://www.nspo.org.tw). In general, the RSI performs well and receives high quality images which proved to be very useful for various applications. However, some RSI panchromatic products exhibit obvious trembling artifact that must be removed. Preliminary study reveals that the trembling artifact is caused by the instability of the spacecraft attitude. Though the magnitude of this artifact is actually less than half of a pixel, it affects the applicability of panchromatic products. A procedure removing this artifact is therefore needed for providing image products of consistent quality. Due to the nature of trembling artifact, it is impossible to describe the trembling amount by employing an analytic model. Relied only on image itself, an algorithm determining trembling amount and removing accordingly the trembling artifact is proposed. The algorithm consists of 3 stages. First, a cross-correlation based scheme is used to measure the relative shift between adjacent scan lines. Follows, the trembling amount is estimated from the measured value. For this purpose, the Fourier transform is utilized to characterize random shifts in frequency domain. An adaptive estimation method is then applied to deduce the approximate trembling amount. In the subsequent stage, image re-sampling operation is applied to restore the trembling-free product. Experimental results show that by applying the proposed algorithm, the unpleasant trembling artifact is no longer evident.

  • PDF

X-band Compact Digital Phase Shifter Design (X 대역 소형 디지털 위상 천이기 설계)

  • 엄순영;전순익;육종관;박한규
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.13 no.9
    • /
    • pp.907-915
    • /
    • 2002
  • In this paper, a compact digital phase shifter to be used an active phased array antenna system for satellite communications was proposed. The even and odd mode analysis for a given reflection-type phase shifter, which uses a folded hybrid coupler as a base element, was performed and the design parameters were derived. Also, to verify experimentally the electrical performances of the proposed structure, X-band 4-bit digital phase shifter was designed and fabricated using Teflon soft substrate $({\varepsilon}_r; =\;2.17)$. Its circuit size was less than 3.5 cm $\times$ 3.0 cm, and it exhibited at least 50 % size reduction as compared with the conventional unfolded configuration. The experimental results of the fabricated phase shifter showed that the average insertion loss and insertion loss variation were less than 3.5 dB, $\pm$ 0.6 dB within the operating band, 7.9 ~ 8.4 GHz, respectively. And, input and output return loss were more than 10 dB, respectively. Also, the phase response of the phase shifter showed 4-bit operation with $\pm$3$^{\circ}$ rms phase error.

Design of Encryption/Decryption Core for Block Cipher HIGHT (블록 암호 HIGHT를 위한 암·복호화기 코어 설계)

  • Sonh, Seung-Il
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.16 no.4
    • /
    • pp.778-784
    • /
    • 2012
  • A symmetric block cryptosystem uses an identical cryptographic key at encryption and decryption processes. HIGHT cipher algorithm is 64-bit block cryptographic technology for mobile device that was authorized as international standard by ISO/IEC on 2010. In this paper, block cipher HIGHT algorithm is designed using Verilog-HDL. Four modes of operation for block cipher such as ECB, CBC, OFB and CTR are supported. When continuous message blocks of fixed size are encrypted or decrypted, the desigend HIGHT core can process a 64-bit message block in every 34-clock cycle. The cryptographic processor designed in this paper operates at 144MHz on vertex chip of Xilinx, Inc. and the maximum throughput is 271Mbps. The designed cryptographic processor is applicable to security module of the areas such as PDA, smart card, internet banking and satellite broadcasting.

A Study on the Out-of-Step Detection Algorithm using Time Variation of Complex Power-Part II : Out-of-Step Detection Algorithm using a Trajectory of Complex Power (복소전력의 변화율을 이용한 동기탈조 검출 알고리즘에 관한 연구-Part II: 복소전력의 궤적 변화를 이용한 동기탈조 검출 알고리즘)

  • Kim Chul-Hwan;Heo Jeong-Yong;Kwon O-Sang
    • The Transactions of the Korean Institute of Electrical Engineers A
    • /
    • v.54 no.5
    • /
    • pp.217-225
    • /
    • 2005
  • In a power system, an out-of-step condition causes a variety of risk such as serious damage to system elements, tripping of loads and generators, mal-operation of relays, etc. Therefore, it is very important to detect the out-of-step condition and take a proper measure. Several out-of-step detection methods have been employed in relays until now. Most common method used for an out-of-step detection is based on the transition time through the blocking impedance area in R-X diagram. Also, the R-R dot out-of-step relay, the out-of-step prediction method and the adaptive out-of-step relay using the equal area criterion (EAC) and Global Positioning Satellite (GPS) technology have been developed. This paper presents the out-of-step detection algorithm using the time variation of the complex power. The complex power is calculated and the mechanical power of the generator is estimated by using the electrical power, and then the out-of-step detection algorithm which is based on the complex power and the estimated mechanical power, is presented. This algorithm may detect the instant when the generator angle passes the Unstable Equilibrium Point (UEP). The proposed out-of-step algorithm is verified and tested by using Alternative Transient Program/Electromagnetic Transient Program (ATP/EMTP) MODELS.

A Study on the Out-of-Step Detection Algorithm using Time Variation of Complex Power-Part II : Out-of-Step Detection Algorithm using a trajectory of Complex power (복소전력의 변화율을 이용한 동기탈조 검출 알고리즘에 관한 연구-Part II: 복소전력의 궤적 변화를 이용한 동기탈조 검출 알고리즘)

  • Kwon, O.S.;Kim, C.H.;Park, N.O.;Chai, Y.M.
    • Proceedings of the KIEE Conference
    • /
    • 2005.07a
    • /
    • pp.313-315
    • /
    • 2005
  • In a power system, an out-of-step condition causes a variety of risk such as serious damage to system elements, tripping of loads and generators, mal-operation of relays, etc. Therefore, it is very important to detect the out-of-step condition and take a proper measure. Several out-of-step detection methods have been employed in relays until now Mo,;t common method used for an out-of-step detection is based on the transition time through the blocking impedance area in R-X diagram. Also, the R-R dot out-of- step relay, the out-of-step prediction method and the adaptive out-of-step relay using the equal area criterion (EAC) and Global Positioning Satellite (GPS) technology have been developed. This paper presents the out-of-step detection algorithm using the time variation of the complex power. The complex power is calculated and the mechanical power of the generator is estimated by using the electrical power, and then the out-of-step detection algorithm, which is based on the complex Power and the estimated mechanical power, is presented. This algorithm, may detect the instant when the generator angle passes the Unstable Equilibrium Point (UEP). The proposed out-of-step algorithm is verified and tested by using Alternative Transient Program/Electromagnetic Transient Program (ATP/EMTP) MODELS.

  • PDF

Development of outage-free installation method and equipments for underground power distribution system (지중배전선로 무정전 공법의 최적화를 위한 장비 개발)

  • Yu, K.Y.;Joo, J.M.;Lee, Y.S.;Kim, Y.M.;Kang, N.K.
    • Proceedings of the KIEE Conference
    • /
    • 2005.11b
    • /
    • pp.122-124
    • /
    • 2005
  • Underground distribution system is a trend due to the successive development of metropolitan area and satellite cities and the environment of the commercial and residential areas. The high quality of electricity, which is related with the minimal outage duration time due to the maintenance work for the underground distribution line, is mandatory. Hence, the construction method and tools for the outage-free maintenance construction have been required for underground distribution system. So far, all the efforts for outage-free maintenance for the underground distribution have been limited only to the survey for foreign countries situation and the theoretical provision; thus, It is required to develop the various construction method and the application tools. Differently from the aerial line, the construction of the underground cable is complicated and the insulation distance between conductor and shield should be maintained in loadmaking/breaking operation, though the apparatus connected with cable is a deadfront type. Also since the apparatus is installed above ground, by-pass of faulted area at busy area needs a variety of high technologies. Therefore, in this these, the authors introduce the development status of the loadbreak connectors, connection facilities, outage-free maintenance system for secondary side, a secondary auxiliary bushing and additional tools so that there can be more progress on this field.

  • PDF

A CMOS Fully Integrated Wideband Tuning System for Satellite Receivers (위성 수신기용 광대역 튜너 시스템의 CMOS 단일칩화에 관한 연구)

  • Kim, Jae-Wan;Ryu, Sang-Ha;Suh, Bum-Soo;Kim, Sung-Nam;Kim, Chang-Bong;Kim, Soo-Won
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.39 no.7
    • /
    • pp.7-15
    • /
    • 2002
  • The digital DBS tuner is designed and implemented in a CMOS process using a direct-conversion architecture that offers a high degree of integration. To generate mathched LO I/Q quadrature signals covering the total input frequency range, a fully integrated ring oscillator is employed. And, to decrease a high level of phase noise of the ring oscillator, a frequency synthesizer is designed using a double loop strucure. This paper proposes and verifies a band selective loop for fast frequency switching time of the double loop frequency synthesizer. The down-conversion mixer with source follower input stages is used for low voltage operation. An experiment implementation of the frequency synthesizer and mixer with integrated a 0.25um CMOS process achieves a switching time of 600us when frequency changes from 950 to 2150MHz. And, the experiment results show a quadrature amplitude mismatch of max. 0.06dB and a quadrature phase mismathc of max. >$3.4^{\circ}$.