• Composites Research
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• v.24 no.4
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• pp.48-54
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• 2011

The effect of moisture contents by salt water on the strength of composite single-lap bonded joints is investigated. The specimens were manufactured in an autoclave by secondary bonding and immersed in the 3.5% salt water of $71^{\circ}C$ for different durations to get various moisture contents; 0, 0.2, 0.5, 1.0, and 2.0%(saturation). A total of 80 joint specimens were tested for 5 different moisture contents and 2 temperature environments. Test results show that while the joint strengths after the saturation of moisture decrease compared to those of dry ones, the strengths of the pre-saturated joint up to 1.0% of moisture content increase in both room and elevated temperature conditions. It is also shown that the strengths of joints tested in elevated temperature are slightly higher than the strength in room temperature by 2-5% until the moisture content reaches 1 %. In contrast, the high temperature strength of the saturated joint is about 5% lower than the room temperature strength.

• Journal of Welding and Joining
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• v.29 no.1
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• pp.52-58
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• 2011

In this paper, the direct bonding process between FPCB and HPCB was studied. By using an ultrasonic horn which is mounted on the ultrasonic bonding machine, it is alternatively possible to bond the gold pads attached on the FPCB and HPCB at room temperature without an adhesive like ACA or NCA. The process condition for obtaining more bonding strength than 0.6 Kgf, which is commercially required, was carried out as 40 kHz of frequency, 0.6 MPa of bonding pressure and 2 second of bonding time. The peel off test was performed for evaluating bonding strength which results in more than 0.8 Kgf.

• Journal of the Microelectronics and Packaging Society
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• v.14 no.1
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• pp.19-26
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• 2007

This study was focused on the feasibility of ultrasonic bonding of Au flip chip bumps for a practical complementary metal oxide semiconductor (CMOS) image sensor with electroplated Au substrate. The ultrasonic bonding was carried out with different bonding pressures and times after the atmospheric pressure plasma cleaning, and then the die shear test was performed to optimize the ultrasonic bonding parameters. The bonding pressure and time strongly affected the bonding strength of the bumps. The Au flip chip bumps were successfully bonded with the electroplated Au substrate at room temperature, and the bonding strength reached approximate 73 MPa under the optimum conditions.

• Proceedings of the Korean Society for Technology of Plasticity Conference
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• 2008.05a
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• pp.517-520
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• 2008

Recently, use of adhesive bonding technology is increased to achieve the multi-material design for lightweight structure in automobile industry. In this paper, the fracture strength of adhesive has been studied with the single lap shear test conducted at different temperatures. The joint specimens are made from Al 5052 and SPRC 440 bonded with structural epoxy adhesive. The operating temperature has been considered up to $150[^{\circ}C]$ and the single lap shear test has been conducted with 5mm/min tensile rate. Fracture strength of adhesive bonded joint has been decreased with increase of operating temperature. The fracture strength at the $100[^{\circ}C]$ was shown about half of that at room temperature.

• Journal of the Korean Ceramic Society
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• v.35 no.6
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• pp.535-542
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• 1998

SOI(silicon oninsulator) was fabricated through the direct bonding of a hydrophilized single crystal Si wafer and a thermally oxidized SiO2 thin film to investigate the stacking faults in silicon at the Si/SiO2 in-terface. At first the oxidation kinetics of SiO2 thin film and the stacking fault distribution at the oxidation interface were investigated. The stacking faults could be divided into two groups by their size and the small-er ones were incorporated into the larger ones as the oxidation time and temperature increased. The den-sity of the smaller ones based critically lower eventually. The SOI wafers directly bonded at the room temperature were annealed at 120$0^{\circ}C$ for 1 hour. The stacking faults at the bonding and oxidation interface were examined and there were anomalies in the distributions of the stacking faults of the bonded region to arrange in ordered ring-like fashion.

• Journal of the Korean institute of surface engineering
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• v.33 no.2
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• pp.101-106
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• 2000

SOI (Silicon-On-Insulator) substrates were fabricated with varying annealing temperature of $25-660^{\circ}C$ by a linear annealing method, which was modified RTA process using a linear shape heat source. The annealing method was applied to Si ∥ $SiO_2$/Si pair pre-contacted at room temperature after wet cleaning process. The bonding strength of SOI substrates was measured by two methods of Razor-blade crack opening and direct tensile test. The fractured surfaces after direct tensile test were also investigated by the optical microscope as well as $\alpha$-STEP gauge. The interface bonding energy was 1140mJ/m$^2$ at the annealing temperature of $430^{\circ}C$. The fracture strength was about 21MPa at the temperature of $430^{\circ}C$. These mechanical properties were not reported with the conventional furnace annealing or rapid thermal annealing method at the temperature below $500^{\circ}C$. Our results imply that the bonded wafer pair could endure CMP (Chemo-Mechanical Polishing) or Lapping process without debonding, fracture or dopant redistribution.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.30 no.10
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• pp.615-624
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• 2017

This study investigated the various physical and electrical effects of silicon direct bonding. Direct bonding means the joining of two wafers together without an intermediate layer. If the surfaces are flat, and made clean and smooth using HF treatment to remove the native oxide layer, they can stick together when brought into contact and form a weak bond depending on the physical forces at room temperature. An IR camera and acoustic systems were used to analyze the voids and bonding conditions in an interface layer during bonding experiments. The I-V and C-V characteristics are also reported herein. The capacitance values for a range of frequencies were measured using a LCR meter. Direct wafer bonding of silicon is a simple method to fuse two wafers together; however, it is difficult to achieve perfect bonding of the two wafers. The direct bonding technology can be used for MEMS and other applications in three-dimensional integrated circuits and special devices.

• Journal of the Korean Ceramic Society
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• v.36 no.8
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• pp.863-870
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• 1999

SOI(silicon on insulafor) was fabricated through the direct bonding using (100) Si wafer and 4$^{\circ}$off (100) Si wafer to investigate the stacking faults in silicon at the Si/SiO2 oxidized and bonded interface. The treatment time of wafer surface using MSC-1 solution was varied in order to observe the effect of cleaning on bonding characteristics. As the MSC-1 treating time increased surface hydrophilicity was saturated and surface microroughness increased. A comparison of surface hydrophilicity and microroughness with MSC-1 treating time indicates that optimum surface modified condition for time was immersed in MSC-1 for 2 min. The SOI structure directly bonded using (100) Si wafer and 4$^{\circ}$off (100) Si wafer at the room temperature were annealed at 110$0^{\circ}C$ for 30 min. Then the stacking faults at the bonding and oxidation interface were examined after the debonding. The results show that there were anomalies in the gettering of the stacking faults at the bonded region.

• Proceedings of the Materials Research Society of Korea Conference
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• 1998.08a
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• pp.137.4-137
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• 1998

• Proceedings of the Materials Research Society of Korea Conference
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• 1998.08a
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• pp.146.1-146
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• 1998