• IEIE Transactions on Smart Processing and Computing
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• v.4 no.5
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• pp.371-378
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• 2015

In this paper, a different type of pulse width modulation (PWM) control scheme for a buck converter is introduced. The proposed buck converter uses PWM with frequency hopping and a low quiescent.current low dropout (LDO) voltage regulator with a power supply rejection ratio enhancer to reduce high spurs, harmonics and output voltage ripples. The low quiescent.current LDO voltage regulator is not described in this paper. A three-bit binary-to-thermometer decoder scheme and voltage ripple controller (VRC) is implemented to achieve low voltage ripple less than 3mV to increase the efficiency of the buck converter. An internal clock that is synchronized to the internal switching frequency is used to set the hopping rate. A center frequency of 2.5MHz was chosen because of the bluetooth low energy (BLE) application. This proposed DC-DC buck converter is available for low-current noise-sensitive loads such as BLE and radio frequency loads in portable communications devices. Thus, a high-efficiency and low-voltage ripple is required. This results in a less than 2% drop in the regulator's efficiency, and a less than 3mV voltage ripple, with -26 dBm peak spur reduction operating in the buck converter.

• Journal of IKEEE
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• v.23 no.2
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• pp.722-726
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• 2019

In this paper, we propose a low drop-out (LDO) regulator with improved power-supply rejection (PSR) characteristics in the high frequency region. In particular, an NMOS transistor with a high output resistance is added as a compensation circuit to offset the high frequency noise passing through the finite output resistance of the PMOS power switch. The elimination of power supply noise by the compensating transistor was explained analytically and presented as the direction for further improvement. The circuit was fabricated in a $0.35-{\mu}m$ standard CMOS process and Specter simulations were carried out to confirm the PSR improvement of 26 dB compared to the conventional LDO regulator at 10 MHz.

• Journal of Electrical Engineering and Technology
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• v.10 no.5
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• pp.2018-2030
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• 2015

A two stage ac drive configuration consisting of a single-phase line commutated rectifier and a three-phase voltage source inverter (VSI) is very common in low and medium power applications. The deterministic pulse width modulation (PWM) methods like sinusoidal PWM (SPWM) could not be considered as an ideal choice for modern drives since they result mechanical vibration and acoustic noise, and limit the application scope. This is due to the incapability of the deterministic PWM strategies in sprawling the harmonic power. The random PWM (RPWM) approaches could solve this issue by creating continuous harmonic profile instead of discrete clusters of dominant harmonics. Insufficient filtering at dc link results in the amplitude distortion of the input dc voltage to the VSI and has the most significant impact on the spectral errors (difference between theoretical and practical spectra). It is obvious that the sprawling effect of RPWM undoubtedly influenced by input fluctuation and the discrete harmonic clusters may reappear. The influence of dc link fluctuation on harmonics and their spreading effect in the VSI remains invalidated. A case study is done with four different filter capacitor values in this paper and results are compared with the constant dc input operation. This paper also proposes an ingenious RPWM, a ripple dosed sinusoidal reference-random carrier PWM (RDSRRCPWM), which has the innate capacity of suppressing the effect of input fluctuation in the output than the other modern PWM methods. MATLAB based simulation study reveals the fundamental component, total harmonic distortion (THD) and harmonic spread factor (HSF) for various modulation indices. The non-ideal dc link is managed well with the developed RDSRRCPWM applied to the VSI and tested in a proto type VSI using the field programmable gate array (FPGA).

• Proceedings of the KIEE Conference
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• 2002.07b
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• pp.1081-1083
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• 2002

Voltage sag is discussed a important problem of power quality in transmission sys-tem. So recently The study on the compensatio-n for voltage sag is made good progress, Especially a compensation in unbalance sources system is difficult. In this paper, we proposed a series voltage compensator and a rejection of voltage ripple from synchronous frame in unbal-anced sources

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.2291-2294
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• 2003

In this paper, analysis and control design of ac-dc converter, normally nonlinear time-varying system, using sliding mode controller to achieve fast output voltage response, disturbance rejection and robust system in the presence of load variation are demonstrated. The objective of this method is to develop methodology for output voltage to be constant and input current sinusoidal that results in nearly unity power factor, respectively. In addition the converter can be also bidirectional power flow. Simulation results using Matlab/Simulink show the effectiveness of sliding mode control system compared with linear feedback controller to guarantee enhanced PF>0.98, THD<5%, and ripple output voltage is less than 1% at the maximum output power.

• Journal of the Korean Vacuum Society
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• v.4 no.4
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• pp.413-416
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• 1995

고주파 마그네트론 스펏터링법을 이용하여 ZnO막을 제조하고 유리기판 위에 ZnO-SAW필터를 제작하였다. ZnO막의 제조 조건은 고주파 전력 150W, 기판온도 $200^{\circ}C$, 분위기압 5mTorr 및 O2/(Ar+O2)비 50%였다. 한편 IDT(Inter-digital transducer)전극은 전극 폭을 2.56mm, 전극 거리를 2,936mm, λ/8폭을 $8mu$m로 설계하였다. 제작된 ZnO-SAW필터의 주파수 응답을 측정하기 위해 소자는 mount(TO8)에 고정시켰다. ZnO SAW필터의 통과 대역(3 dB대역폭)은 345.2~44.8 MHz로 9.6MHz의 대역 폭을 나타내었으며 중심주 파수는 40 MHz를 나타내었다. 또한 삽입 손실은 39 dB, 통과 대역에서의 리플(ripple)은 $\pm$ 0.8 dB 및 rejection은 17 dB를 나타내었다.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2006.05a
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• pp.153-156
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• 2006

The vibration isolation system is a system that attenuates the vibration transmitted from surroundings by using external energy supply like electricity and feedback and/or feedforward functions. Such a system needs stiff structure to make precise positioning without ripple within a certain bandwidth. So, a horizontal and rotary arrangement of the actuation module is suggested by using lever linkage. Modeling and kinematic formulation are completed and system identification is accomplished to tune the design variables accurately. The vibration isolation control is performed by mu-synthesis with the uncertainties in design variables. Low frequency signal enhancement circuit and saturation proof integration algorithm are devised to use seismic sensors for displacement control. This overall system shows good disturbance rejection performance.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• v.2B no.4
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• pp.191-200
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• 2002

When power consumption increases, power supply must be efficient and reliable for good power quality. The studies on compensation system of power quality are processing actively. Voltage sag among of factors for power quality is generally PI dual control that voltage sag compensation is used. But this control is no more available since of 120[KHz] ripple rejection. So we proposed the control algorithm using PID control in 3-phase unbalanced power system and the series voltage compensator, when voltage sag occurs.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.421-422
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• 2015

Nowadays, bidirectional DC-DC converters are becoming more into picture for different applications especially electric vehicles. There are many bidirectional DC-DC converters topologies; however, voltage-fed Dual Half-Bridge (DHB) topology has less number of switches as compared to other isolated bidirectional DC-DC converters. Furthermore, voltage fed DHB has galvanic isolation, high power density, reduced size, high efficiency and hence cost effective. Electrolytic capacitors always have problem regarding size and reliability in DC-AC single phase inverters. Therefore, voltage-fed DHB converter is proposed for the purpose of power decoupling to replace electrolytic capacitor by film capacitors. A new control strategy has been developed for 120Hz ripple rejection, and it was verified by simulation.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.05b
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• pp.78-81
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• 2000

A new type low-pass filter design method based on a coupled line and transmission line theory is proposed to suppress harmonics by attenuation poles in the stop band The design formula are derived using the equivalent circuit of a coupled transmission line. The new low-pass filter structure is shown to have attractive properties such as compact size, wide stop band range and low insertion loss. The seventh-order low-pass filter designed by present method Ins a cutoff frequency of 0.9 GHz with a 0.01 dB ripple level. The coupled line type low-pass filter with stripline configuration was fabricated by using a high-temperature superconducting (HTS ; $YBa_2Cu_3O_{7-x}$) thin film on MgO(100) substrate. Since the HTS coupled line type low-pass filter was proposed with five attenuation poles in stop band such as 1.8, 2.5, 4, 5.5, 62 GHz. The fabricated low-pass filter has improved the attenuation characteristics up to seven times of the cutoff frequency Bemuse of good rejection of the spurious signals and harmonics, our low-pass filter is applicable to mobile base station systems such as cellular, personal communication systems and international mobile telecommunication(IMT)-2000 systems.