• Title/Summary/Keyword: resistor

Search Result 1,002, Processing Time 0.029 seconds

Effect of Annealing Conditions on Properties of Ni-Cr Thin Film Resistor (Ni-Cr 박막 저항의 특성에 미치는 열처리 조건의 영향)

  • Ryu Sung-Rok;Myung Sung-Jea;Koo Bon-Keup;Kang Beong-Don;Ryu Jei-Chun;Kim Dong-Jin
    • Proceedings of the International Microelectronics And Packaging Society Conference
    • /
    • 2003.11a
    • /
    • pp.145-150
    • /
    • 2003
  • In the electronic components and devices fabrication, thin film resistors with low TCR(temperature coefficient of resistance) and high precision have been used over 3 GHz microwave in recent years. Ni-Cr alloys thin films resistors is one of the most commonly used resistive materials because it has low TCR and highly stable resistance. In this work, we fabricated thin film resistors using Evanohm alloys target(72Ni-20Cr-3Al-4Mn-Si) of s-type with excellent resistors properties by RF-sputtering. Also we reported best annealing conditions of thin film resistors for microwave to observe microstructure and electronic properties of thin film according to annealing conditions$(200^{\circ}C,\;300^{\circ}C,\;400^{\circ}C,\;500^{\circ}C)$.

  • PDF

Improved negative capacitance circuit stable with a low gain margin (이득 여유가 작아도 안정한 개선된 네가티브 커패시턴스 회로)

  • 김영필;황인덕
    • Journal of the Institute of Electronics Engineers of Korea SC
    • /
    • v.40 no.6
    • /
    • pp.68-77
    • /
    • 2003
  • An improved negative capacitance circuit that cancels out input impedance of a front-end in a bioimpedance measurement and operates stably with a low gain margin has been proposed. Since the proposed circuit comprises wide-band operational amplifiers, selecting operational amplifiers is easy, while an operational amplifier of prefer bandwidth should be chosen to apply conventional circuit. Also, since gain margin can be controlled by a feedback resistor connected serially with a feedback capacitor, gain margin is tuneable with a potentiometer. The input impedance of the proposed circuit is two times larger than that of the conventional circuit and 40-times than that without a negative capacitance circuit. Furthermore, closed-loop phase response of the proposed circuit is better than that of the conventional circuit or without a negative capacitance circuit. Above all, for the proposed circuit, the frequency at which a gain peaking occurs is higher than the frequency at which the loop gain becomes a maximum. Thus, the proposed circuit is not affected by a gain peaking and can be operated with a very low gain margin.

Design of a Novel 200 MHz CMOS Linear Transconductor and Its Application to a 20 MHz Elliptic Filter (새로운 200 MHz CMOS 선형 트랜스컨덕터와 이를 이용한 20 MHz 일립틱 여파기의 설계)

  • Park, Hee-Jong;Cha, Hyeong-Woo;Chung, Won-Sup
    • Journal of the Institute of Electronics Engineers of Korea SC
    • /
    • v.38 no.4
    • /
    • pp.20-30
    • /
    • 2001
  • A novel 200 MHz CMOS transconductor using translinear cells is proposed. The proposed transconductor consists of voltage followers and current followers based on translinear cells and a resistor. For wide applications, a single-input single-output, a single-Input differential-output, and a fully-differential transconductor are systematically designed, respectively. The theory of operation is described and computer simulation results are used to verify theoretical predictions. The results show that the fully-differential transconductor has a linear input voltage range of ${\pm}2.7$ V, a 3 dB frequency of 200 MHz, and a temperature coefficient of less than 41 $ppm/^{\circ}C$ at supply voltages of ${\pm}3$ V. In order to certify the applicability of the fully-differential transconductor, A ladder-type 3th-order cllitic low pass filter is also designed based on the inductance simulation method. The filter has a ripple bandwidth of 22 MHz, a pass-band ripple of 0.36 dB, and a cutoff frequency of 26 MHz.

  • PDF

Comparative Analysis of Synthetic Memristor Emulator and M-R Mutator (합성형 멤리스터 에뮬레이터와 M-R 뮤테이터의 특성 비교)

  • Choi, Hyuncheol;Kim, Hyongsuk
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.53 no.5
    • /
    • pp.98-107
    • /
    • 2016
  • An analytical comparison of a synthetic memristor emulator and a M-R mutator-based memristor emulator has been performed. Memristor is an electrical element with the characteristic of variable resistance. It is called the fourth fundamental electrical element following resistor, capacitor, and inductor. Memristor emulator is a circuit which implements the feature of variable resistance via the composition of various electrical devices. It is an essential circuit to study memristor characteristics during the time before it is commercially available. There are two representative memristor emulators depending upon their implementation methods. One is a memristor emulator which is synthesized via combining various electrical devices and the other one is M-R mutator-based memristor emulator implemented by extracting resistance from a nonlinear device. In this paper, implementation methods of these two memristor emulators are studied and their differences are investigated by analysing their characteristics.

Design of Novel OTP Unit Bit and ROM Using Standard CMOS Gate Oxide Antifuse (표준 CMOS 게이트 산화막 안티퓨즈를 이용한 새로운 OTP 단위 비트와 ROM 설계)

  • Shin, Chang-Hee;Kwon, Oh-Kyong
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.46 no.5
    • /
    • pp.9-14
    • /
    • 2009
  • In this paper, we proposed a novel OTP unit bit of CMOS gate oxide antifuse using the standard CMOS process without additional process. The proposed OTP unit bit is composed of 3 transistors including an NMOS gate oxide antifuse and a sense amplifier of inverter type. The layout area of the proposed OTP unit bit is $22{\mu}m^2$ similar to a conventional OTP unit bit. The programming time of the proposed OTP unit bit is 3.6msec that is improved than that of the conventional OTP unit bit because it doesn't use high voltage blocking elements such as high voltage blocking switch transistor and resistor. And the OTP array with the proposed OTP unit bit doesn't need sense amplifier and bias generation circuit that are used in a conventional OTP array because sense amplifier of inverter type is included to the proposed OTP unit bit.

Design of a 1.2V 7-bit 800MSPS Folding-Interpolation A/D Converter with Offset Self-Calibration (Offset Self-Calibration 기법을 적용한 1.2V 7-bit 800MSPS Folding-Interpolation A/D 변환기의 설계)

  • Kim, Dae-Yun;Moon, Jun-Ho;Song, Min-Kyu
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.47 no.3
    • /
    • pp.18-27
    • /
    • 2010
  • In this paper, a 1.2V 7-bit 1GSPS A/D converter with offset self-calibration is proposed. The proposed A/D converter structure is based on the folding-interpolation whose folding rate is 2, interpolation rate is 8. Further, for the purpose of improving the chip performance, an offset self-calibration circuit is used. The offset self-calibration circuit reduce the variation of the offset-voltage,due to process mismatch, parasitic resistor, and parasitic capacitance. The chip has been fabricated with a 1.2V 65nm 1-poly 6-metal CMOS technology. The effective chip area is $0.87mm^2$ and the power dissipates about 110mW at 1.2V power supply. The measured SNDR is about 39.1dB when the input frequency is 250MHz at 800MHz sampling frequency. The measured SNDR is 3dB higher than the same circuit without any calibration.

A Study on DC Traction Power Supply System Using PWM Converter (PWM컨버터를 적용한 경전철 전력공급시스템에 관한 연구)

  • Kim, Joorak;Park, Chang-Reung;Park, Kijun;Kim, Joo-Uk
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.29 no.4
    • /
    • pp.250-254
    • /
    • 2016
  • Currently, power conversion system which converts AC to DC Power is applied in domestic urban railway. The diode rectifier is used in most of them. However the diode rectifier can not control the output voltage and can not regenerate power as well. On the other hand, PWM (pulse width modulation) converter using IGBT (isolated gate bipolar transistor) can control output voltage, allowing it to reduce the output voltage drop. Moreover the Bi-directional conduction regenerates power which does not require additional device for power regeneration control. This paper compared the simulation results for the DC power supply system on both the diode rectifier and the PWM converter. Under the same load condition, simulation circuit for each power supply system was constructed with the PSIM (performance simulation and modeling tool) software. The load condition was set according to the resistance value of the currently operating impedance of light rail line, and the line impedance was set according to the distance of each substations. The train was set using a passive resistor. PI (proportional integral) controller was applied to regulate the output voltage. PSIM simulation was conducted to verify that the PWM Converter was more efficient than the diode rectifier in DC Traction power supply system.

Developing Affective Computing Game with Player's Bio-Signal (사용자의 생체 신호를 이용한 감성 컴퓨팅 게임 개발)

  • Lee, Chung-Hyeon;Kim, Dong-Gyun;Kim, Hye-Young;Kang, Shin-Jin
    • Journal of Korea Game Society
    • /
    • v.16 no.6
    • /
    • pp.91-100
    • /
    • 2016
  • In this research, Affective computing game has been developed which reacts with a player's bio-signals. A modified computer mouse will be used to collect bio-signals by GSR, FSR, and infrared thermometer. This modified computer mouse collect human bio-signals in non-intrusive way. The collected data is complementary reflected in 3 level of tension of a player. The player's tension affects on the game and the reaction for NPC will be followed. Then this leads to plot changes individually. To let diverse NPC reaction and interactive story telling, Live 2d and Inkle Script have been used. This research can be alternative method on the game development using Affective computing.

An Unequal Divider with Enhanced Physical Isolation Between Output Ports (출력포트 사이의 물리적 격리도를 향상시킨 비대칭분배기)

  • Kim, Young;Yoon, Young-Chul
    • Journal of Advanced Navigation Technology
    • /
    • v.18 no.4
    • /
    • pp.359-363
    • /
    • 2014
  • This paper presents the design and performance of an unequal divider with physical separation and electrical isolation. This divider has a series $18{\Omega}$ resistor and 0.7 pF capacitor circuit between two quarter-wave transmission lines at half phase angle from input terminal. This design method was improved a physical isolation between output ports and easy connected other circuit because of unnecessary of extra transmission line. To show the validity of the unequal divider with complex isolation components, a 4:1 ratio unequal divider was designed and measured at center frequency of 2 GHz. The measured divider performances have the return loss of 17 dB, insertion loss of 1.5 dB and 7.7 dB, and isolation of 18 dB. Its performance is in good agreement with the simulated results.

A Study on the Fabrication of the Low Noise Amplifier Using a Series Feedback Method (직렬 피드백 기법을 이용한 저잡음 증폭기의 구현에 관한 연구)

  • 김동일;유치환;전중성;정세모
    • Journal of the Korean Institute of Navigation
    • /
    • v.25 no.1
    • /
    • pp.53-60
    • /
    • 2001
  • This paper presents the fabrication of the LNA which is operating at 2.13 ~ 2.16 GHz for IMT-2000 front-end receiver using series feedback and resistive decoupling circuit. Series feedback added to the source lead of a GaAs FET keeps the low noise characteristics and drops the input reflection coefficient of a low noise amplifier simultaneously. Also, it increases the stability of the LNA. Resistive decoupling circuit is suitable for input stage matching because a signal at low frequency is dissipated by a resistor in the matching network. The amplifier consists of GaAs FET ATF-10136 for low noise stage and VNA-25 which is internally matched MMIC for high gain stage. The amplifier is fabricated with both the RF circuits and self bias circuit on the Teflon substrate with 3.5 permittivity. The measured results of the LNA which is fabricated using the above design technique are presented more than 30 dB in gain, PldB 17 dB and less than 0.7 dB in noise figure, 1.5 in inputㆍoutput SWR(Standing Wave Ratio).

  • PDF