• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.1
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• pp.107-115
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• 2014

The reduced-bit transform based bit-plane matching algorithm (BPM) can obtain the block matching result through its simple calculation and hardware design compared to the conventional block matching algorithms (BMAs), but the block matching accuracy of BPMs is somewhat low. In this paper, reduced-bit transform based sum of the absolute difference (R-SAD) is proposed to improve the block matching accuracy in comparison with the conventional BPMs and it is shown that the matching process can be obtained using the logical operations. Firstly, this method transforms the current and the reference images into their respective 2-bit images and then a truth table is obtained from the relation between input and output 2-bit images. Next, a truth table is simplified by Karnaugh map and the absolute difference is calculated by using simple logical operations. Finally, the simulation results show that the proposed R-SAD can obtain higher accuracy in block matching results compared to the conventional BPMs through the PSNR analysis in the motion compensation experiments.

• Journal of Information Processing Systems
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• v.13 no.1
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• pp.114-127
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• 2017

This paper proposes a color image coding algorithm based on shape-adaptive all phase biorthogonal transform (SA-APBT). This algorithm is implemented through four procedures: color space conversion, image segmentation, shape coding, and texture coding. Region-of-interest (ROI) and background area are obtained by image segmentation. Shape coding uses chain code. The texture coding of the ROI is prior to the background area. SA-APBT and uniform quantization are adopted in texture coding. Compared with the color image coding algorithm based on shape-adaptive discrete cosine transform (SA-DCT) at the same bit rates, experimental results on test color images reveal that the objective quality and subjective effects of the reconstructed images using the proposed algorithm are better, especially at low bit rates. Moreover, the complexity of the proposed algorithm is reduced because of uniform quantization.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.32B no.9
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• pp.1207-1214
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• 1995

We present an optimized integer cosine transform(OICT) as an alternative approach to the conventional discrete cosine transform(DCT), and its fast computational algorithm. In the actual implementation of the OICT, we have used the techniques similar to those of the orthogonal integer transform(OIT). The normalization factors are approximated to single one while keeping the reconstruction error at the best tolerable level. By obtaining a single normalization factor, both forward and inverse transform are performed using only the integers. However, there are so many sets of integers that are selected in the above manner, the best OICT matrix obtained through value minimizing the Hibert-Schmidt norm and achieving fast computational algorithm. Using matrix decomposing, a fast algorithm for efficient computation of the order-8 OICT is developed, which is minimized to 20 integer multiplications. This enables us to implement a high performance 2-D DCT processor by replacing the floating point operations by the integer number operations. We have also run the simulation to test the performance of the order-8 OICT with the transform efficiency, maximum reducible bits, and mean square error for the Wiener filter. When the results are compared to those of the DCT and OIT, the OICT has out-performed them all. Furthermore, when the conventional DCT coefficients are reduced to 7-bit as those of the OICT, the resulting reconstructed images were critically impaired losing the orthogonal property of the original DCT. However, the 7-bit OICT maintains a zero mean square reconstruction error.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.7
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• pp.1654-1667
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• 1996

The conventional fractal image compression methods have high computational complexity at encoding reduce PSNR at low bit rate and havehighly visible blocking effects in a reconstructed image. In this paper we propose a fractal image compression method based on disctete wavelet transform domain, which takes the absolute value of discrete wavelet transform coefficient, and assembles the discrete wavelet tranform coefficients of different highpass subbands corresponding to the same spatial block and then applies "0" encoding according to the energy of each range blocks. The proposed method improved PSNR at low bit rate and reduced computational complexity at encoding distinctly. Also, this method can achieve a blockless reconstructed image and perform hierarchical decoding without recursive constractive transformation. Computer simulations with several test images show that the proposed method shows better performance than convnetional fractal coding methods for encoding still pictures. pictures.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.37 no.3
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• pp.45-55
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• 2000

In this paper, we proposed the hardware architecture of wavelet transform digital filter for an image processing. Filter bank pyramid algorithm is used for wavelet transform and each fillet is implemented by the FIR filter. For DWT computation, because the memory controller is implemented by hardware, we can efficiently process the multisolution decomposition of the image data only input the parameter. As a result of the image Processing in this paper, 33㏈ PSNR has been obtained on 512$\times$512 B/W image due to 11-bit mantissa processing in FPGA Implementation. And because of using QMF( Quadrature Mirror Filter) properties, it reduces half number of the multiplier needed DWT(Discrete Wavelet Transform) computation so the hardware size is reduced largely. The proposed scheme can increase the efficiency of an image Processing as well as hardware size reduced. The hardware design proposed of DWT fillet bank is synthesized by VHDL coding and then the test board is manufactured, the operating Program and the application Program are implemented using MFC++ and C++ language each other.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.10 no.9
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• pp.4467-4486
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• 2016

Discrete cosine transform (DCT) based JPEG standard significantly improves the coding efficiency of image compression, but it is unacceptable event in serious blocking artifacts at low bit rate and low efficiency of high-definition image. In the light of all phase digital filtering theory, this paper proposes a novel transform based on discrete sine transform (DST), which is called all phase discrete sine biorthogonal transform (APDSBT). Applying APDSBT to JPEG scheme, the blocking artifacts are reduced significantly. The reconstructed image of APDSBT-JPEG is better than that of DCT-JPEG in terms of objective quality and subjective effect. For improving the efficiency of JPEG coding, the structure of JPEG is analyzed. We analyze key factors in design and evaluation of JPEG compression on the massive parallel graphics processing units (GPUs) using the compute unified device architecture (CUDA) programming model. Experimental results show that the maximum speedup ratio of parallel algorithm of APDSBT-JPEG can reach more than 100 times with a very low version GPU. Some new parallel strategies are illustrated in this paper for improving the performance of parallel algorithm. With the optimal strategy, the efficiency can be improved over 10%.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.527-528
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• 2006

In this paper, we propose an IP design and implementation of System on a chip(SoC) for Discrete Cosine Transform (DCT) and Discrete Wavelet Transform (DWT) processor using adder-based DA(Adder-based Distributed Arithmetic). To reduced hardware cost and to improve operating speed, the combined DCT/ DWT processor used the bit-serial method and DA module. The transform of coefficient equation result in reduction in hardware cost and has a regularity in implementation. We use Verilog-HDL and Xilinx ISE for simulation and implement FPGA on SoCMaster-3.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.15 no.3
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• pp.221-231
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• 1990

In this paper, A new 2-D DCT algorithm is proposed to reduce the computational amount of transform operation using the distribution of the motion compensated error signal and the bit allocation table. In the this algorithm, 2-D Walsh-Hadamard transform is directly computed and then multiplied by a constant matrix. Multiplications are concentrated on the final stage in thie algorithm, thus the computational amount is reduced in proportion to the number of transform coefficients that are excluded from quatization. The computational amount in computing only the DCT coefficients allocated to the bit allocation table is calculated. As the result, the number of multiplications is less thn the algorithm known to have the fewest number of computations when less than 0.6 bits per pixel are allocated to tranform coding for the motion compensated error image in the case of the proposed algorithm. Thus, it shows that the proposed algorithm is valid in reducing the computational loads of transform coding.

• Journal of Broadcast Engineering
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• v.16 no.5
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• pp.861-872
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• 2011

Many fast block-matching algorithms (BMAs) in motion estimation field reduce computational complexity by screening the number of checking points. Although many fast BMAs reduce computations, sometimes they should endure matching errors in comparison with full-search algorithm (FSA). In this paper, a novel fast BMA for constrained one-bit transform (C1BT)-based motion estimation is proposed in order to decrease the calculations of the block distortion measure. Unlike the classical fast BMAs, the proposed algorithm shows a new approach to reduce computations. It utilizes the binomial distribution based on the characteristic of binary plane which is composed of only two elements: 0 and 1. Experimental results show that the proposed algorithm keeps its peak signal-to-noise ratio (PSNR) performance very close to the FSA-C1BT while the computation complexity is reduced considerably.

• Phonetics and Speech Sciences
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• v.1 no.4
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• pp.97-103
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• 2009

This paper describes a new algorithm for encoding spectral envelope in the time domain alias cancellation (TDAC) part of G.729.1. The spectral envelope and modified discrete cosine transform (MDCT) coefficients of the weighted code-excited linear predictive (CELP) coding error in lower-band and the higher-band input signal are encoded in the TDAC part. In order to reduce allocation bits for spectral envelope coding, a new algorithm using sub-band correlation between adjacent frames is proposed. In addition, to improve the quality of decoded signals, two bit allocation strategies using reduced bits from the proposed algorithm are proposed. The performance of the proposed algorithm is evaluated in terms of objective quality and bit reduction rates. Experimental results show that the proposed algorithm increases the quality of sounds significantly.