• 제목/요약/키워드: recursive computation

검색결과 81건 처리시간 0.024초

Recursive PCA-based Remote Sensor Data Management System Applicable to Sensor Network

  • Kim, Sung-Ho;Youk, Yui-Su
    • International Journal of Fuzzy Logic and Intelligent Systems
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    • 제8권2호
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    • pp.126-131
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    • 2008
  • Wireless Sensor Network(WSNs) consists of small sensor nodes with sensing, computation, and wireless communication capabilities. It has new information collection scheme and monitoring solution for a variety of applications. Faults occurring to sensor nodes are common due to the limited resources and the harsh environment where the sensor nodes are deployed. In order to ensure the network quality of service it is necessary for the WSN to be able to detect the faulty sensors and take necessary actions for the reconstruction of the lost sensor data caused by fault as earlier as possible. In this paper, we propose an recursive PCA-based fault detection and lost data reconstruction algorithm for sensor networks. Also, the performance of proposed scheme was verified with simulation studies.

재귀적 베이시안 필터를 적용한 소화기탄의 충돌속도 추정 연구 (Recursive Bayesian Filter based Strike Velocity Estimation for Small Caliber Projectile)

  • 김종환;조성식
    • 한국군사과학기술학회지
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    • 제19권2호
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    • pp.177-184
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    • 2016
  • This paper presents a strike velocity estimation using the recursive Bayesian filter that operates both correction and prediction models to probabilistically remove noises of sensors and accurately estimate the strike velocity during the real-time experiments. Four different types of bullets such as 5.56 mm M193, 7.62 mm M80, 5.45 mm 7N10 and 7.62 mm MSC were used to validate the proposed method. Compared to the existing method, the proposed method statistically results in higher stability of the strike velocity estimation as well as its reliability for the ballistic limit velocity computation.

능동소음제어를 위한 IIR 구조 2차경로 추정 알고리즘 (IIR Structure Secondary Path Estimation Algorithms for Active Noise Control Systems)

  • 최영훈;안동준;남현도
    • 조명전기설비학회논문지
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    • 제25권2호
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    • pp.143-149
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    • 2011
  • In this paper, IIR structures are proposed to reduce the computation complexity of the secondary-pass estimation in active noise control(ANC) systems. However, there are stability problems of using IIR models to reduce the computation complexity in ANC systems. To overcome these problems, we propose a stabilizing procedure of recursive least mean squares (RLMS) algorithms for eatimating the parameters of IIR models of the secondary path transfer functions. The multichannel ANC systems are implemented by using the TMS320C6713 DSP board to test the performance of computation complexity and stability of the proposed methods. Comparing the IIR filters with the FIR filters, the IIR filters can reduce 50[%] of the computation and obtain similar noise reduction result.

다물체 차량모델을 이용한 실시간 동역학 시뮬레이션 (Real-time Dynamic Simulation Using Multibody Vehicle Model)

  • 최규재;노기한;유영면
    • 대한기계학회논문집A
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    • 제25권3호
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    • pp.486-494
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    • 2001
  • This paper presents a real-time multibody vehicle dynamic analysis method using recursive Kanes formulation and suspension composite joints. To shorten the computation time of simulation, relative coordinate system is used and the equations of motion are derived using recursive Kanes formulation. Typical suspension systems of vehicles such as MacPherson strut suspension system is modeled by suspension composite joints. The joints are derived and utilized to reduce the computation time of simulation without any degradation of kinematical accuracy of the suspension systems. Using the develop program, a multibody vehicle dynamic model is formed and simulations are performed. Accuracy of the simulation results is compared to the real vehicle field test results. It is found that the simulation results using the proposed method are very accurate and real-time simulation is achieved on a computer with single PowerPC 604 processor.

A Symbolic Computation Method for Automatic Generation of a Full Vehicle Model Simulation Code for a Driving Simulator

  • Lee Ji-Young;Lee Woon-Sung
    • Journal of Mechanical Science and Technology
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    • 제19권spc1호
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    • pp.395-402
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    • 2005
  • This paper deals with modeling and computer simulation of a full multibody vehicle model for a driving simulator. The multibody vehicle model is based on the recursive formulation and a corresponding simulation code is generated automatically from AUTOCODE, which is a symbolic computation package developed by the authors using MAPLE. The paper describes a procedure for automatically generating a highly efficient simulation code for the full vehicle model, while incorporating realistically modeled components. The following issues have been accounted for in the procedure, including software design for representing a mechanical system in symbolic form as a set of computer data objects, a multibody formulation for systems with various types of connections between bodies, automatic manipulation of symbolic expressions in the multibody formulation, interface design for allowing users to describe unconventional force-and torque-producing components, and a method for accommodating external computer subroutines that may have already been developed. The effectiveness and efficiency of the proposed method have been demonstrated by the simulation code developed and implemented for driving simulation.

SDFT 고정소수점 연산에 대한 유한 비트 오차영향 해석 (Analytic derivation of the finite wordlength errors in fixed-point implementation of SDFT)

  • 장태규;김재화
    • 대한전자공학회논문지SP
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    • 제37권4호
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    • pp.65-71
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    • 2000
  • 본 논문에서는 SDFT(sliding discrete-Fourier transform)을 순환식(recursive)으로 구현할 때 유한 비트 고정소수점 계산하여 발생하는 오차의 영향을 해석적으로 구하는 방법을 제시하고 이의 유도 과정을 기술하였다. 유한 비트 오차는 계수의 양자화 때문에 발생하는 계수오차와, 곱셈연산 후 반올림되는 유효자리 때문에 발생하는 반올림오차로 구성된다. 각각의 오차는 주파수 스펙트럼 추정오차를 야기 시키며, 이 스펙트럼 오차의 전력과 실제 스펙트럼의 전력 비(noise-to-signal power ratio NSR)를 진동계수를 표현하는 비트 수, DFT 값을 표현하는 비트 수, 그리고 DFT 구간길이에 대한 식으로 유도하였다. 유도과정은 SDFT 순환식(recursive equation)을 통해 유도한 오차방정식(error-dynamic equation)과 계수오차 및 반올림오차의 확률분포특성에 근거하였다. 해석적으로 유도한 NSR 결과를 시뮬레이션 실험을 통해 얻은 결과와 비교하여 타당성을 확인하였다.

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반복 이산 웨이브릿 변환을 이용한 주파수 추정 기법 (Frequency Estimation Technique using Recursive Discrete Wavelet Transform)

  • 박철원
    • 전기학회논문지P
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    • 제60권2호
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    • pp.76-81
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    • 2011
  • Power system frequency is the main index of power quality indicating an abnormal state and disturbances of systems. The nominal frequency is deviated by sudden change in generation and load or faults. Power system is used as frequency relay to detection for off-nominal frequency operation and connecting a generator to an electrical system, and V/F relay to detection for an over-excitation condition. Under these circumstances, power system should maintain the nominal frequency. And frequency and frequency deviation should accurately measure and quickly estimate by frequency measurement device. The well-known classical method, frequency estimation technique based on the DFT, could be produce the gain error in accuracy. To meet the requirements for high accuracy, recently Wavelet transforms and analysis are receiving new attention. The Wavelet analysis is possible to calculate the time-frequency analysis which is easy to obtain frequency information of signals. However, it is difficult to apply in real-time implementation because of heavy computation burdens. Nowadays, the computational methods using the Wavelet function and transformation techniques have been searched on these fields. In this paper, we apply the Recursive Discrete Wavelet Transform (RDWT) for the frequency estimation. In order to evaluate performance of the proposed technique, the user-defined arbitrary waveforms are used.

반복 가산 기법을 이용한 Fresnel 홀로그램의 고속 계산 알고리듬 (Fast Computation Algorithm of Fresnel Holograms Using Recursive Addition Method)

  • 최현준;서영호;김동욱
    • 한국통신학회논문지
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    • 제33권5C호
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    • pp.386-394
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    • 2008
  • 디지털 홀로그래픽 비디오 시스템을 제작하기 위해서는 디지털 홀로그램을 가능한 빠르게 생성하는 것이 중요하다. 본 논문에서는 디지털 홀로그램의 전체 좌표를 대상으로 반복적인 가산 연산을 이용하여 Fresnel 홀로그램의 생성 속도를 높이는 알고리듬을 제안한다. 디지털 홀로그램을 계산하기 위한 3차원 객체는 컴퓨터 그래픽(computer graphic, CG)으로 제작한 깊이영상(depth-map image)을 이용하였다. 본 논문에서 제안하는 알고리듬은 부동소수점 형식의 반복가산기법을 이용하여 디지털 홀로그램의 위상을 고속으로 계산하는 기법이다. 실험결과 제안한 알고리듬은 일반적인 CGH 수식을 이용한 기법의 70%, [3]에서 제안한 기법보다 30%이상 연산속도가 빨라졌다.

ppcor: An R Package for a Fast Calculation to Semi-partial Correlation Coefficients

  • Kim, Seongho
    • Communications for Statistical Applications and Methods
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    • 제22권6호
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    • pp.665-674
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    • 2015
  • Lack of a general matrix formula hampers implementation of the semi-partial correlation, also known as part correlation, to the higher-order coefficient. This is because the higher-order semi-partial correlation calculation using a recursive formula requires an enormous number of recursive calculations to obtain the correlation coefficients. To resolve this difficulty, we derive a general matrix formula of the semi-partial correlation for fast computation. The semi-partial correlations are then implemented on an R package ppcor along with the partial correlation. Owing to the general matrix formulas, users can readily calculate the coefficients of both partial and semi-partial correlations without computational burden. The package ppcor further provides users with the level of the statistical significance with its test statistic.

이차원 Constant Geometry FFT VLSI 알고리즘 및 아키텍쳐 (VLSI Algorithms & Architectures for Two Dimensional Constant Geometry FFT)

  • 유재희;곽진석
    • 전자공학회논문지B
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    • 제31B권5호
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    • pp.12-25
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    • 1994
  • A two dimensional constant geometry FFT algorithms and architectures with shuffled inputs and normally ordered outputs are presented. It is suitable for VLSI implementation because all buterfly stages have identical, regular structure. Also a methodology using shuffled FFT inputs and outputs to halve the number of butterfly stages connected by a global interconnection which requires much area is presented. These algorithms can be obtained by shuffling the row and column of a decomposed FFT matrix which corresponds to one butterfly stage. Using non-recursive and recursive pipeline, the degree of serialism and parallelism in FFT computation can be adjusted. To implement high performance high radix FFT easily and reduce the amount of interconnections between stages, the method to build a high radix PE with lower radix PE 's is discussed. Finally the performances of the present architectures are evaluated and compared.

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