• 전력전자학회논문지
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• 제9권5호
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• pp.430-437
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• 2004

본 논문에서는 고주파 스위칭 시 스위칭 손실의 감소, 구현의 용이성 및 인버터 제어를 위하여 요구되는 연산시간 감소 등 다양한 장점을 가진 4-Switch 인버터를 대상으로, 새로운 2상 스위칭 패턴(Pattern)과 이에 적용된 새로운 SRP-PWM(Separately Random Pulse Position PWM)기법을 제안한다. 본 논문에서는 고속운전 영역에서의 인버터 출력전류의 고조파 스펙트럼을 넓은 주파수 영역으로 즉, 특정주파수의 side-band로 고루 분산시키는 결과로부터 제안한 스위칭 패턴과 이에 적용된 새로운 SRP-PWM기법의 고조파 저감효과를 확인하고자 한다. 따라서 DSP를 이용한 IGBT인버터에 의한 실험을 수행하고, 이로부터 얻은 결과를 MATLAB/SIMULINK를 이용한 시뮬레이션 결과와 비교ㆍ분석하여 제안된 기법의 타당성을 검증하고자 한다.

• 한국멀티미디어학회논문지
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• 제2권2호
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• pp.176-183
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• 1999

Using Asynchronous Transfer Mode(ATM) which is a high-bandwidth, low-delay, cell switching and multiplexing technology, Broadband-Integrated Services Digital Network (B-ISDN) can support communication services of all kinds. To evaluate the performance of ATM networks, traffic source models to meet the requirements are demanded. We can obtain random traffic distribution for ATM networks by using the Cellular Automata (CA) which have effective random pattern generation capability. In this paper we propose an algorithm using 2-D LHCA to generate more effective random patterns with good random characteristics. And we show that the randomness by 2-D LHCA is better than that of the randomness by 1-D LHCA.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제9권6호
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• pp.2317-2337
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• 2015

Cryptography provides an effective solution to secure the communication over public networks. The communication over public networks that includes electronic commerce, business and military services, necessitates the requirement of simple and robust encryption techniques. In this paper, a novel image encryption method which employs calligraphy based hybrid scan and random number is presented. The original image is scrambled by pixel position permutation with calligraphy based diagonal and novel calligraphy based scan patterns. The cipher image is obtained by XORing the scrambled image with random numbers. The suggested method resists statistical, differential, entropy, and noise attacks which have been demonstrated with a set of standard images.

• Current Optics and Photonics
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• 제3권5호
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• pp.390-400
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• 2019

Encrypted images obtained through double random phase-encoding (DRPE) occupy considerable storage space. We propose efficient compression schemes to reduce the size of the encrypted data. In the proposed schemes, two state-of-art compression methods of JPEG and JP2K are applied to the quantized encrypted phase images obtained by combining the DRPE algorithm with the virtual photon counting imaging technique. We compute the nonlinear cross-correlation between the registered reference images and the compressed input images to verify the performance of the compression of double random phase-encoded images. We show quantitatively through experiments that considerable compression of the encrypted image data can be achieved while security and authentication factors are completely preserved.

• 품질경영학회지
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• 제21권2호
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• pp.17-26
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• 1993

Process fault diagnosis is a complicated matter because quality control problems can result from a variety of causes. These causes include problems with electrical components, mechanical components, human errors, job justification errors, and air conditioning influences. In order to make the system run smoothly with minimum delay, it is necessary to suggest heuristic remedies for the detected faults. Hence, this paper describes a heuristic methodology of fault diagnosis that is performed using statistical patterns generated by quality characteristics The proposed methodology is described briefly as follows: If a sample pattern generated by random variables is similar to the number of prototype patterns, the sample pattern may be matched by any prototype pattern among them to be resembled. This concept is based on the similarity between a sample pattern and the matched prototype pattern. The similarity is calculated as the weighted average of squared deviation, which is expressed as the difference between the relative values of standard normal distribution to be transformed by the observed values of quality characteristics in a sample pattern and the critical values of the corresponding ones in a matched prototype pattern.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 하계종합학술대회논문집
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• pp.875-878
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• 1998

In this thesis, we present efficient techniques to reduce the switching activity in a CMOS combinational logic network based on local logic transforms. But this techniques is not appropriate in the view of testability because of deteriorating the random pattern testability of a circuit. This thesis proposes a circuit design method having two operation modes. For the sake of power dissipation(normal operation mode), a gate output switches as rarely as possible, implying highly skewed signal probabilities for 1 or 0. On the other hand, at test mode, signals have probabilities of being 1 or 0 approaching 0.5, so it is possible to exact both stuck-at faults on the wire. Therefore, the goals of synthesis for low power and random pattern testability are achieved. The hardware overhead sof proposed design method are only one primary input for mode selection and AND/OR gate for each redundant connection.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 추계종합학술대회 논문집
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• pp.935-938
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• 1999

메모리 테스트는 Built-In Self Test(BIST)와 같이 메모리에 내장된 회로를 통하여 자체 점검하는 방법과 테스터를 통하여 생성된 패턴을 주입하는 방법이 있다. 테스트 패턴 생성방법으로는 각각의 고장모델에 대한 테스트 패턴을 deterministic하게 생성해주는 방법과 Pseudo Random Pattern Generator(PRPG)를 이용하여 생성하는 경우로 구분할 수 있다. 본 연구에서는 PRPG를 패턴 생성기로 사용하여 여러 가지 메모리의 결함을 대표한다고 볼 수 있는 Static 및 Dynamic Neighborhood Pattern Sensitive Fault(NPSF) 등 다양한 종류의 고장을 점검할 수 있도록 메모리 BIST를 구성하였다. 기존의 Linear Feedback Shift Register(LFSR)보다 본 연구에서 제안하는 Linear Hybrid Cellular Automata(LHCA)를 이용한 PRPG가 높고 안정된 고장 점검도를 나타내었다.

• 전자공학회논문지A
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• 제31A권6호
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• pp.159-168
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• 1994

Stochastic computation is adopted to reduce the silicon area of the multipliers in implementing neural network in VLSI. In addition to this advantage, the stochastic computation has inherent random errors which is required for implementing Boltzmann machine. This random noise is useful for the simulated annealing which is employed to achieve the global minimum for the Boltzmann Machine. In this paper, we propose a method to implement the Boltzmann machine with stochastic computation and discuss the addition problem in stochastic computation and its simulated annealing in detail. According to this analysis Boltzmann machine using stochastic computation is suitable for the pattern recognition/completion problems. We have verified these results through the simulations for XOR, full adder and digit recognition problems, which are typical of the pattern recognition/completion problems.

• Structural Engineering and Mechanics
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• 제31권2호
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• pp.153-162
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• 2009

The reduction of the dynamic response of an offshore structure subjected to wind-generated random ocean waves is of extreme significance in the aspects of serviceability, fatigue life and safety of the structure. In this study, a new neuro-control scheme is applied to the vibration control of a fixed offshore platform under random wave loads to examine the applicability of the proposed method. It is called the Lattice Probabilistic Neural Network (LPNN), as it utilizes lattice pattern of state vectors as the training data of PNN. When control results of the LPNN are compared with those of the NN and PNN, LPNN showed better performance in effectively suppressing the structural responses in a shorter computational time.

• 대한전자공학회논문지SD
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• 제46권5호
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• pp.15-24
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• 2009

본 논문은 유사랜덤 방식의 BIST를 기반으로 하여 스캔 shifting시의 transition을 획기적으로 줄여 주었던 transition freezing 기법과 새롭게 제안하는 고장검출율 100%를 위한 pattern mapping 기법을 결합한 효과적인 저전력 BIST구조에 대해 제안한다. Transition freezing 기법으로 생성된 고연관의 저전력 패턴은 패턴 인가 초기에는 많은 수의 고장을 검출해 내지만, 패턴의 수가 점점 늘어날수록 랜덤 저항 고장의 증가로 인해 추가적인 고장 검출에는 한계가 있었다. 이러한 비검출 고장에 대해 ATPG를 통한 테스트 패턴을 생성하여, 고장을 검출하지 못하는 frozen pattern과 mapping을 함으로써 기 생성된 패턴을 재활용하여 인가되는 패턴의 수와 테스트 시간을 줄임으로써 전력 소모량을 줄일 수 있었다.