• Journal of KIISE:Computer Systems and Theory
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• v.34 no.10
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• pp.467-473
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• 2007

Power-aware design is one of the most important areas to be emphasized in multimedia mobile systems, in which data transfers dominate the power consumption. In this paper, we propose a new architecture for motion compensation (MC) of H.264/AVC with power reduction by decreasing the data transfers. For this purpose, a reconfigurable microarchitecture based on data type is proposed for interpolation and it is mapped onto the dedicated motion compensation IP (intellectual property) effectively without sacrificing the performance or the system latency. The original quarter-pel interpolation equation that consists of one or two half-pel interpolations and one averaging operation is designed to have different execution control modes, which result in decreasing memory accesses greatly and maintaining the system efficiency. The simulation result shows that the proposed method could reduce up to 87% of power consumption caused by data transfers over the conventional method in MC module.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.40 no.2
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• pp.372-379
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• 2015

The latest video compression standard (such as H.264/AVC and HEVC) utilizes quarter-pel accuracy motion estimation in order to retain detailed motion information. Many sub-pixel motion estimation algorithms used in the spatial domain usually encounters increment of computational complexity due to embedded interpolation algorithm. In this paper, an approach to measure sub-pixel accuracy motion estimation in frequency domain using shifting matrix is proposed. Complexity can be reduced utilizing shifting matrix algorithm in frequency domain and simulation results demonstrate not only higher PSNR but lower bit rates than spatial domain algorithms.